资源列表
排序选择：
IsomapR1
- 基于测地距离不变性的非线性降维算法源码，原文发表在2000年的Science杂志上，需要了解具体原理者请先看其论文。-based on geodesic distance invariance of nonlinear reduced dimension algorithm source code, the text published in 2000 in Science magazine, the need to understand the specific tenets who can
Verilog Modeling
- verilog语言建模资料，从网上整理的，-Verilog language modeling information collated from the Internet.
PLI
- VCS下编译通过的PLI的实例，包括功能仿真，和可综合代码-VCS compiled under the pli example, including the functional simulation, and integrated code
c实现图像处理常用算法集
- 本人收集的关于c实现图像处理常用算法，包括Hough变换，雕刻技术，灰度均衡，图像的3D灰度显示，拉普拉斯高斯边缘检测等等，-I collected on c achieve common image processing algorithms, including the Hough transform, carving, gray balance, 3D gray-scale images, Laplace Gaussian edge detection and so on.
逆滤波处理c代码
- 逆滤波处理算法c代码，供学习信号处理专业的朋友参考使用，-inverse filter processing algorithms c code for the study of professional signal processing reference to the use of a friend,
维纳滤波处理c代码
- 用c写了维纳滤波处理算法，里面有算法使用说明，供大家学习信号处理时参考-used to write the Wiener filter algorithm, and they use algorithms for signal processing to emulate reference
Hough变换vc实现
- vc实现hough的源代码，使用说明和测试图片，供大家参考。-vc achieve the source code, testing and use photographs for reference.
fifo1616
- FIFO先入先出堆栈，包括三个子程序，可根据需要选择-FIFO first in-first stack, including three subprogram, according to choose
RISC8.ZIP
- 简单的一个8位RISC，Verilog HDL代码,类型为pic16c57-a simple eight RISC, Verilog HDL code, the type of pic16c57
micro uart
- 硬件uart源程序verilog HDL，即相关文档-hardware UART Verilog HDL source, that the relevant documents
八位的伪随机数产生的verilog文件
- 八位的伪随机数产生的verilog文件linear-feedback-shift-register-eight pseudo-random number generator in Verilog document linear-feedback - shift-register
A Verilog HDL Test Bench Primer
- Lattice公司的A Verilog HDL Test Bench Primer应用手册-Lattice A Verilog HDL Test Bench Primer Handbook