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文件名称:Xilinx_Speedway_EDK11

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  • 上传时间:
    2012-11-16
  • 文件大小:
    22.73mb
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    0次
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介绍说明--下载内容来自于网络,使用问题请自行百度

TRAINING ISE XILINX 11.1-TRAINING ISE XILINX  11.1
相关搜索: Xilinx ISE

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Speedway/Fall_09/EDK_Intro_2_MB/Lab1/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/bitinit.log
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blkdiagram/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blkdiagram/svg10.dtd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blkdiagram/system.css
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blkdiagram/system.html
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blkdiagram/system.svg
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/blockdiagram/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/clock_generator_0.log
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/data/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/data/system.ucf
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/etc/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/etc/bitgen.ut
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/etc/download.cmd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/etc/fast_runtime.opt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/clock_generator_0_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/debug_module_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/dip_switches_8bit_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/dlmb_cntlr_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/dlmb_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/elaborate/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/hdl/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/hdl/vhdl/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/hdl/vhdl/lmb_bram_elaborate.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/ilmb_cntlr_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/ilmb_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/leds_8bit_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/lmb_bram_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/mb_plb_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/microblaze_0_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/proc_sys_reset_0_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/rs232_uart_1_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/system.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/system_stub.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/xps_intc_0_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/xps_timer_0_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/hdl/xps_timer_1_wrapper.vhd
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/bitgen.ut
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/clock_generator_0_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/clock_generator_0_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/clock_generator_0_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/clock_generator_0_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/debug_module_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/debug_module_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/debug_module_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/debug_module_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dip_switches_8bit_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dip_switches_8bit_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dip_switches_8bit_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dip_switches_8bit_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_cntlr_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_cntlr_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_cntlr_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_cntlr_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/dlmb_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/download.bit
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/fpga.flw
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_cntlr_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_cntlr_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_cntlr_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_cntlr_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/ilmb_wrapper_vhdl.prj
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/leds_8bit_wrapper/
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/leds_8bit_wrapper.ngc
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/leds_8bit_wrapper.ngc_xst.xrpt
Speedway/Fall_09/EDK_Intro_2_MB/Lab1/implementation/leds_8bit_wrapper_vhdl.prj

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