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文件名称:web_cpu88.zip

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [Windows] [程序]
  • 上传时间：
    2012-09-04
  • 文件大小：
    590.07kb
  • 已下载：
    0次
  • 提 供 者：
    卢***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Intel微处理器8088的VHDL实现，可以用ModelSim进行仿真测试。,Realization of intel microprocessor 8088 in VHDL language, and can be tested and simulated with ModelSim.
相关搜索： web_cpu88.zip 8088 vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

web_cpu88/bin/
web_cpu88/bin/bin2case.exe
web_cpu88/bin/bin2coe.exe
web_cpu88/bin/bin2hex.exe
web_cpu88/bin/bin2mem.exe
web_cpu88/copying.txt
web_cpu88/cpu86_license.txt
web_cpu88/cpu86_rtl/
web_cpu88/cpu86_rtl/alu_rtl.vhd
web_cpu88/cpu86_rtl/a_table.vhd
web_cpu88/cpu86_rtl/biufsm_fsm.vhd
web_cpu88/cpu86_rtl/biu_struct.vhd
web_cpu88/cpu86_rtl/cpu86instr.vhd
web_cpu88/cpu86_rtl/cpu86pack.vhd
web_cpu88/cpu86_rtl/cpu86_struct.vhd
web_cpu88/cpu86_rtl/datapath_struct.vhd
web_cpu88/cpu86_rtl/dataregfile_rtl.vhd
web_cpu88/cpu86_rtl/divider_rtl_ser.vhd
web_cpu88/cpu86_rtl/d_table.vhd
web_cpu88/cpu86_rtl/formatter_struct.vhd
web_cpu88/cpu86_rtl/ipregister_rtl.vhd
web_cpu88/cpu86_rtl/multiplier_rtl.vhd
web_cpu88/cpu86_rtl/m_table.vhd
web_cpu88/cpu86_rtl/n_table.vhd
web_cpu88/cpu86_rtl/proc_rtl.vhd
web_cpu88/cpu86_rtl/readme.txt
web_cpu88/cpu86_rtl/regshiftmux_regshift.vhd
web_cpu88/cpu86_rtl/r_table.vhd
web_cpu88/cpu86_rtl/segregfile_rtl.vhd
web_cpu88/drigmorn1/
web_cpu88/drigmorn1/coregen/
web_cpu88/drigmorn1/coregen/blk_mem_40K.ngc
web_cpu88/drigmorn1/coregen/blk_mem_40K.vhd
web_cpu88/drigmorn1/coregen/blk_mem_40K.xco
web_cpu88/drigmorn1/coregen/coregen.cgp
web_cpu88/drigmorn1/DRIGMORN1.ucf
web_cpu88/drigmorn1/ISE/
web_cpu88/drigmorn1/ISE/Drigmorn1/
web_cpu88/drigmorn1/ISE/Drigmorn1/alu_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/a_table.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/biufsm_fsm.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/biu_struct.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/blk_mem_40K.ngc
web_cpu88/drigmorn1/ISE/Drigmorn1/blk_mem_40K.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/Bootstrap_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/cpu86instr.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/cpu86pack.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/cpu86_struct.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/cpu86_top_struct.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/datapath_struct.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/dataregfile_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/divider_rtl_ser.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/Drigmorn1.ise
web_cpu88/drigmorn1/ISE/Drigmorn1/Drigmorn1.ntrc_log
web_cpu88/drigmorn1/ISE/Drigmorn1/Drigmorn1.restore
web_cpu88/drigmorn1/ISE/Drigmorn1/DRIGMORN1.ucf
web_cpu88/drigmorn1/ISE/Drigmorn1/d_table.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/formatter_struct.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_baud_rate_gen.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_binary2gray.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_counter_down_ce_ld.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_counter_down_ce_ld_tc.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_counter_integer_down.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_DECODE_3to8.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_edge_det.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_edge_det_XCD.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_fifo_async16_rcsr_wf.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_fifo_async16_sr.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_gray2binary.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_jkff.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_parity_gen_Serial.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_register_ce.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_shift_reg_PL_sl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_shift_reg_se_sl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_uart_16550.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_uart_Rx_8bit.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/gh_uart_Tx_8bit.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/ipregister_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/multiplier_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/m_table.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/n_table.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/proc_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/regshiftmux_regshift.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/r_table.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/segregfile_rtl.vhd
web_cpu88/drigmorn1/ISE/Drigmorn1/smartpreview.twr
web_cpu88/drigmorn1/ISE/Drigmorn1/top.ptwx
web_cpu88/drigmorn1/ISE/Drigmorn1/top_map.map
web_cpu88/drigmorn1/ISE/Drigmorn1/top_ngdbuild.xrpt
web_cpu88/drigmorn1/ISE/Drigmorn1/top_summary.html
web_cpu88/drigmorn1/ISE/Drigmorn1/top_summary.xml
web_cpu88/drigmorn1/ISE/Drigmorn1/top_xst.xrpt
web_cpu88/drigmorn1/ISE/Drigmorn1/uart_top_struct.vhd
web_cpu88/drigmorn1/readme.txt
web_cpu88/drigmorn1/top_rtl/
web_cpu88/drigmorn1/top_rtl/blk_mem_40K.vhd
web_cpu88/drigmorn1/top_rtl/readme.txt
web_cpu88/drigmorn1/top_rtl/top_struct.vhd
web_cpu88/Modelsim/
web_cpu88/Modelsim/loadfname.dat
web_cpu88/Modelsim/run.bat
web_cpu88/Modelsim/tb.tcl
web_cpu88/Modelsim/transcript
web_cpu88/Modelsim/vsim.wlf
web_cpu88/Modelsim/work/
web_cpu88/Opencores_UART/
web_cpu88/Opencores_UART/fileList.txt
web_cpu88/Opencores_UART/gh_baud_rate_gen.vhd
web_cpu88/Opencores_UART/gh_binary2gray.vhd
web_cpu88/Opencores_UART/gh_counter_down_ce_ld.vhd
web_cpu88/Opencores_UART/gh_counter_down_ce_ld_tc.vhd
web_cpu88/Opencores_UART/gh_counter_integer_down.vhd
web_cpu88/Opencores_UART/gh_DECODE_3to8.vhd
web_cpu88/Opencores_UART/gh_edge_det.vhd
web_cpu88/Opencores_UART/gh_edge_det_XCD.vhd
web_cpu88/Opencores_UART/gh_fifo_async16_rcsr_wf.vhd
web_cpu88/Opencores_UART/gh_fifo_async16_sr.vhd
web_cpu88/Opencores_UART/gh_gray2binary.vhd
web_cpu88/Opencores_UART/gh_jkff.vhd

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