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文件名称:exp1.5_mux8_1

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-09-04
  • 文件大小：
    275.32kb
  • 已下载：
    0次
  • 提 供 者：
    dav****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

用VHDL及verylog语言设计一个8选一数据选择器，可以在Quartus II中仿真-Language Design with VHDL and verylog a 8-to-one data selector, you can simulate in the Quartus II
(系统自动生成,下载前可以参看下载内容)

下载文件列表

exp1.5_mux8_1/mux8_1.qsf
exp1.5_mux8_1/Project/Block1.bdf
exp1.5_mux8_1/Project/db/mux8_1.(0).cnf.cdb
exp1.5_mux8_1/Project/db/mux8_1.(0).cnf.hdb
exp1.5_mux8_1/Project/db/mux8_1.asm.qmsg
exp1.5_mux8_1/Project/db/mux8_1.asm_labs.ddb
exp1.5_mux8_1/Project/db/mux8_1.cbx.xml
exp1.5_mux8_1/Project/db/mux8_1.cmp.bpm
exp1.5_mux8_1/Project/db/mux8_1.cmp.cdb
exp1.5_mux8_1/Project/db/mux8_1.cmp.ecobp
exp1.5_mux8_1/Project/db/mux8_1.cmp.hdb
exp1.5_mux8_1/Project/db/mux8_1.cmp.logdb
exp1.5_mux8_1/Project/db/mux8_1.cmp.rdb
exp1.5_mux8_1/Project/db/mux8_1.cmp.tdb
exp1.5_mux8_1/Project/db/mux8_1.cmp0.ddb
exp1.5_mux8_1/Project/db/mux8_1.cmp2.ddb
exp1.5_mux8_1/Project/db/mux8_1.db_info
exp1.5_mux8_1/Project/db/mux8_1.eco.cdb
exp1.5_mux8_1/Project/db/mux8_1.eds_overflow
exp1.5_mux8_1/Project/db/mux8_1.fit.qmsg
exp1.5_mux8_1/Project/db/mux8_1.fnsim.hdb
exp1.5_mux8_1/Project/db/mux8_1.fnsim.qmsg
exp1.5_mux8_1/Project/db/mux8_1.hier_info
exp1.5_mux8_1/Project/db/mux8_1.hif
exp1.5_mux8_1/Project/db/mux8_1.map.bpm
exp1.5_mux8_1/Project/db/mux8_1.map.cdb
exp1.5_mux8_1/Project/db/mux8_1.map.ecobp
exp1.5_mux8_1/Project/db/mux8_1.map.hdb
exp1.5_mux8_1/Project/db/mux8_1.map.logdb
exp1.5_mux8_1/Project/db/mux8_1.map.qmsg
exp1.5_mux8_1/Project/db/mux8_1.map_bb.cdb
exp1.5_mux8_1/Project/db/mux8_1.map_bb.hdb
exp1.5_mux8_1/Project/db/mux8_1.map_bb.hdbx
exp1.5_mux8_1/Project/db/mux8_1.map_bb.logdb
exp1.5_mux8_1/Project/db/mux8_1.pre_map.cdb
exp1.5_mux8_1/Project/db/mux8_1.pre_map.hdb
exp1.5_mux8_1/Project/db/mux8_1.psp
exp1.5_mux8_1/Project/db/mux8_1.root_partition.cmp.atm
exp1.5_mux8_1/Project/db/mux8_1.root_partition.cmp.dfp
exp1.5_mux8_1/Project/db/mux8_1.root_partition.cmp.hdbx
exp1.5_mux8_1/Project/db/mux8_1.root_partition.cmp.logdb
exp1.5_mux8_1/Project/db/mux8_1.root_partition.cmp.rcf
exp1.5_mux8_1/Project/db/mux8_1.root_partition.map.atm
exp1.5_mux8_1/Project/db/mux8_1.root_partition.map.hdbx
exp1.5_mux8_1/Project/db/mux8_1.root_partition.map.info
exp1.5_mux8_1/Project/db/mux8_1.rtlv.hdb
exp1.5_mux8_1/Project/db/mux8_1.rtlv_sg.cdb
exp1.5_mux8_1/Project/db/mux8_1.rtlv_sg_swap.cdb
exp1.5_mux8_1/Project/db/mux8_1.sgdiff.cdb
exp1.5_mux8_1/Project/db/mux8_1.sgdiff.hdb
exp1.5_mux8_1/Project/db/mux8_1.signalprobe.cdb
exp1.5_mux8_1/Project/db/mux8_1.sim.cvwf
exp1.5_mux8_1/Project/db/mux8_1.sim.hdb
exp1.5_mux8_1/Project/db/mux8_1.sim.qmsg
exp1.5_mux8_1/Project/db/mux8_1.sim.rdb
exp1.5_mux8_1/Project/db/mux8_1.simfam
exp1.5_mux8_1/Project/db/mux8_1.sld_design_entry.sci
exp1.5_mux8_1/Project/db/mux8_1.sld_design_entry_dsc.sci
exp1.5_mux8_1/Project/db/mux8_1.syn_hier_info
exp1.5_mux8_1/Project/db/mux8_1.tan.qmsg
exp1.5_mux8_1/Project/db/mux8_1.tis_db_list.ddb
exp1.5_mux8_1/Project/db/mux8_1.tmw_info
exp1.5_mux8_1/Project/db/mux_3nc.tdf
exp1.5_mux8_1/Project/db/prev_cmp_mux8_1.asm.qmsg
exp1.5_mux8_1/Project/db/prev_cmp_mux8_1.fit.qmsg
exp1.5_mux8_1/Project/db/prev_cmp_mux8_1.map.qmsg
exp1.5_mux8_1/Project/db/prev_cmp_mux8_1.qmsg
exp1.5_mux8_1/Project/db/prev_cmp_mux8_1.tan.qmsg
exp1.5_mux8_1/Project/db/wed.wsf
exp1.5_mux8_1/Project/mux8_1.asm.rpt
exp1.5_mux8_1/Project/mux8_1.bsf
exp1.5_mux8_1/Project/mux8_1.done
exp1.5_mux8_1/Project/mux8_1.dpf
exp1.5_mux8_1/Project/mux8_1.fit.rpt
exp1.5_mux8_1/Project/mux8_1.fit.smsg
exp1.5_mux8_1/Project/mux8_1.fit.summary
exp1.5_mux8_1/Project/mux8_1.flow.rpt
exp1.5_mux8_1/Project/mux8_1.map.rpt
exp1.5_mux8_1/Project/mux8_1.map.summary
exp1.5_mux8_1/Project/mux8_1.pin
exp1.5_mux8_1/Project/mux8_1.pof
exp1.5_mux8_1/Project/mux8_1.qpf
exp1.5_mux8_1/Project/mux8_1.qsf
exp1.5_mux8_1/Project/mux8_1.qws
exp1.5_mux8_1/Project/mux8_1.sim.rpt
exp1.5_mux8_1/Project/mux8_1.sof
exp1.5_mux8_1/Project/mux8_1.tan.rpt
exp1.5_mux8_1/Project/mux8_1.tan.summary
exp1.5_mux8_1/Project/mux8_1.tcl
exp1.5_mux8_1/Project/mux8_1.vhd
exp1.5_mux8_1/Project/mux8_1.vwf
exp1.5_mux8_1/Project/pins for mux8_1.txt
exp1.5_mux8_1/Verilog File/mux8_1.v
exp1.5_mux8_1/Verilog File/mux8_1_TB.v
exp1.5_mux8_1/VHDL File/mux8_1.vhd
exp1.5_mux8_1/Project/db
exp1.5_mux8_1/Project
exp1.5_mux8_1/Verilog File
exp1.5_mux8_1/VHDL File
exp1.5_mux8_1

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