文件名称:sram
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sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl
\doc DDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
\doc DDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
(系统自动生成,下载前可以参看下载内容)
下载文件列表
sram/doc/ddr_sdram.pdf
sram/model/mt46v4m16.vhd
sram/model/mti_pkg.vhd
sram/readme.txt
sram/route/ddr_sdram.csf
sram/route/ddr_sdram.esf
sram/route/ddr_sdram.psf
sram/route/ddr_sdram.quartus
sram/route/ddr_sdram.vqm
sram/route/pll1.vhd
sram/simulation/APEX20KE_MF.VHD
sram/simulation/ddr_command.vhd
sram/simulation/ddr_control_interface.vhd
sram/simulation/ddr_data_path.vhd
sram/simulation/ddr_sdram.vhd
sram/simulation/ddr_sdram_tb.vhd
sram/simulation/io_utils.vhd
sram/simulation/lpm_pack.vhd
sram/simulation/modelsim.ini
sram/simulation/mt46v4m16.vhd
sram/simulation/mti_pkg.bak
sram/simulation/mti_pkg.vhd
sram/simulation/pll1.vhd
sram/simulation/readme.txt
sram/simulation/stdlogar.vhd
sram/simulation/util1164.vhd
sram/simulation/wave.do
sram/simulation/work/altcam/behave.dat
sram/simulation/work/altcam/behave.psm
sram/simulation/work/altcam/_primary.dat
sram/simulation/work/altclklock/behavior.dat
sram/simulation/work/altclklock/behavior.psm
sram/simulation/work/altclklock/_primary.dat
sram/simulation/work/altlvds_rx/behavior.dat
sram/simulation/work/altlvds_rx/behavior.psm
sram/simulation/work/altlvds_rx/_primary.dat
sram/simulation/work/altlvds_tx/behavior.dat
sram/simulation/work/altlvds_tx/behavior.psm
sram/simulation/work/altlvds_tx/_primary.dat
sram/simulation/work/command/rtl.dat
sram/simulation/work/command/rtl.psm
sram/simulation/work/command/_primary.dat
sram/simulation/work/control_interface/rtl.dat
sram/simulation/work/control_interface/rtl.psm
sram/simulation/work/control_interface/_primary.dat
sram/simulation/work/ddr_command/rtl.dat
sram/simulation/work/ddr_command/rtl.psm
sram/simulation/work/ddr_command/_primary.dat
sram/simulation/work/ddr_control_interface/rtl.dat
sram/simulation/work/ddr_control_interface/rtl.psm
sram/simulation/work/ddr_control_interface/_primary.dat
sram/simulation/work/ddr_data_path/rtl.dat
sram/simulation/work/ddr_data_path/rtl.psm
sram/simulation/work/ddr_data_path/_primary.dat
sram/simulation/work/ddr_sdram/rtl.dat
sram/simulation/work/ddr_sdram/rtl.psm
sram/simulation/work/ddr_sdram/_primary.dat
sram/simulation/work/ddr_sdram_tb/rtl.dat
sram/simulation/work/ddr_sdram_tb/rtl.psm
sram/simulation/work/ddr_sdram_tb/_primary.dat
sram/simulation/work/io_utils/body.dat
sram/simulation/work/io_utils/body.psm
sram/simulation/work/io_utils/_primary.dat
sram/simulation/work/io_utils/_vhdl.psm
sram/simulation/work/lpm_components/body.dat
sram/simulation/work/lpm_components/body.psm
sram/simulation/work/lpm_components/_primary.dat
sram/simulation/work/lpm_components/_vhdl.psm
sram/simulation/work/mt46v4m16/behave.dat
sram/simulation/work/mt46v4m16/behave.psm
sram/simulation/work/mt46v4m16/_primary.dat
sram/simulation/work/mti_pkg/body.dat
sram/simulation/work/mti_pkg/body.psm
sram/simulation/work/mti_pkg/_primary.dat
sram/simulation/work/mti_pkg/_vhdl.psm
sram/simulation/work/pll1/syn.dat
sram/simulation/work/pll1/syn.psm
sram/simulation/work/pll1/_primary.dat
sram/simulation/work/std_logic_arith/body.dat
sram/simulation/work/std_logic_arith/body.psm
sram/simulation/work/std_logic_arith/_primary.dat
sram/simulation/work/std_logic_arith/_vhdl.psm
sram/simulation/work/util_1164/body.dat
sram/simulation/work/util_1164/body.psm
sram/simulation/work/util_1164/_primary.dat
sram/simulation/work/util_1164/_vhdl.psm
sram/simulation/work/_info
sram/source/ddr_command.vhd
sram/source/ddr_control_interface.vhd
sram/source/ddr_data_path.vhd
sram/source/ddr_sdram.vhd
sram/synthesis/synplicity/ddr_sdram.prj
sram/synthesis/synplicity/rev_1/ddr_sdram.srm
sram/synthesis/synplicity/rev_1/ddr_sdram.srr
sram/synthesis/synplicity/rev_1/ddr_sdram.srs
sram/synthesis/synplicity/rev_1/ddr_sdram.tcl
sram/synthesis/synplicity/rev_1/ddr_sdram.tlg
sram/synthesis/synplicity/rev_1/ddr_sdram.vqm
sram/synthesis/synplicity/rev_1/ddr_sdram.xrf
sram/synthesis/synplicity/rev_1/ddr_sdram_cons.tcl
sram/synthesis/synplicity/rev_1/ddr_sdram_rm.tcl
sram/simulation/work/altcam
sram/simulation/work/altclklock
sram/simulation/work/altlvds_rx
sram/simulation/work/altlvds_tx
sram/simulation/work/command
sram/simulation/work/control_interface
sram/simulation/work/ddr_command
sram/simulation/work/ddr_control_interface
sram/simulation/work/ddr_data_path
sram/simulation/work/ddr_sdram
sram/simulation/work/ddr_sdram_tb
sram/simulation/work/io_utils
sram/simulation/work/lpm_components
sram/simulation/work/mt46v4m16
sram/simulation/work/mti_pkg
sram/simulation/work/pll1
sram/simulation/work/std_logic_arith
sram/simulation/work/util_1164
sram/synthesis/synplicity/rev_1
sram/simulation/work
sram/synthesis/synplicity
sram/doc
sram/model
sram/route
sram/simulation
sram/source
sram/synthesis
sram
sram/model/mt46v4m16.vhd
sram/model/mti_pkg.vhd
sram/readme.txt
sram/route/ddr_sdram.csf
sram/route/ddr_sdram.esf
sram/route/ddr_sdram.psf
sram/route/ddr_sdram.quartus
sram/route/ddr_sdram.vqm
sram/route/pll1.vhd
sram/simulation/APEX20KE_MF.VHD
sram/simulation/ddr_command.vhd
sram/simulation/ddr_control_interface.vhd
sram/simulation/ddr_data_path.vhd
sram/simulation/ddr_sdram.vhd
sram/simulation/ddr_sdram_tb.vhd
sram/simulation/io_utils.vhd
sram/simulation/lpm_pack.vhd
sram/simulation/modelsim.ini
sram/simulation/mt46v4m16.vhd
sram/simulation/mti_pkg.bak
sram/simulation/mti_pkg.vhd
sram/simulation/pll1.vhd
sram/simulation/readme.txt
sram/simulation/stdlogar.vhd
sram/simulation/util1164.vhd
sram/simulation/wave.do
sram/simulation/work/altcam/behave.dat
sram/simulation/work/altcam/behave.psm
sram/simulation/work/altcam/_primary.dat
sram/simulation/work/altclklock/behavior.dat
sram/simulation/work/altclklock/behavior.psm
sram/simulation/work/altclklock/_primary.dat
sram/simulation/work/altlvds_rx/behavior.dat
sram/simulation/work/altlvds_rx/behavior.psm
sram/simulation/work/altlvds_rx/_primary.dat
sram/simulation/work/altlvds_tx/behavior.dat
sram/simulation/work/altlvds_tx/behavior.psm
sram/simulation/work/altlvds_tx/_primary.dat
sram/simulation/work/command/rtl.dat
sram/simulation/work/command/rtl.psm
sram/simulation/work/command/_primary.dat
sram/simulation/work/control_interface/rtl.dat
sram/simulation/work/control_interface/rtl.psm
sram/simulation/work/control_interface/_primary.dat
sram/simulation/work/ddr_command/rtl.dat
sram/simulation/work/ddr_command/rtl.psm
sram/simulation/work/ddr_command/_primary.dat
sram/simulation/work/ddr_control_interface/rtl.dat
sram/simulation/work/ddr_control_interface/rtl.psm
sram/simulation/work/ddr_control_interface/_primary.dat
sram/simulation/work/ddr_data_path/rtl.dat
sram/simulation/work/ddr_data_path/rtl.psm
sram/simulation/work/ddr_data_path/_primary.dat
sram/simulation/work/ddr_sdram/rtl.dat
sram/simulation/work/ddr_sdram/rtl.psm
sram/simulation/work/ddr_sdram/_primary.dat
sram/simulation/work/ddr_sdram_tb/rtl.dat
sram/simulation/work/ddr_sdram_tb/rtl.psm
sram/simulation/work/ddr_sdram_tb/_primary.dat
sram/simulation/work/io_utils/body.dat
sram/simulation/work/io_utils/body.psm
sram/simulation/work/io_utils/_primary.dat
sram/simulation/work/io_utils/_vhdl.psm
sram/simulation/work/lpm_components/body.dat
sram/simulation/work/lpm_components/body.psm
sram/simulation/work/lpm_components/_primary.dat
sram/simulation/work/lpm_components/_vhdl.psm
sram/simulation/work/mt46v4m16/behave.dat
sram/simulation/work/mt46v4m16/behave.psm
sram/simulation/work/mt46v4m16/_primary.dat
sram/simulation/work/mti_pkg/body.dat
sram/simulation/work/mti_pkg/body.psm
sram/simulation/work/mti_pkg/_primary.dat
sram/simulation/work/mti_pkg/_vhdl.psm
sram/simulation/work/pll1/syn.dat
sram/simulation/work/pll1/syn.psm
sram/simulation/work/pll1/_primary.dat
sram/simulation/work/std_logic_arith/body.dat
sram/simulation/work/std_logic_arith/body.psm
sram/simulation/work/std_logic_arith/_primary.dat
sram/simulation/work/std_logic_arith/_vhdl.psm
sram/simulation/work/util_1164/body.dat
sram/simulation/work/util_1164/body.psm
sram/simulation/work/util_1164/_primary.dat
sram/simulation/work/util_1164/_vhdl.psm
sram/simulation/work/_info
sram/source/ddr_command.vhd
sram/source/ddr_control_interface.vhd
sram/source/ddr_data_path.vhd
sram/source/ddr_sdram.vhd
sram/synthesis/synplicity/ddr_sdram.prj
sram/synthesis/synplicity/rev_1/ddr_sdram.srm
sram/synthesis/synplicity/rev_1/ddr_sdram.srr
sram/synthesis/synplicity/rev_1/ddr_sdram.srs
sram/synthesis/synplicity/rev_1/ddr_sdram.tcl
sram/synthesis/synplicity/rev_1/ddr_sdram.tlg
sram/synthesis/synplicity/rev_1/ddr_sdram.vqm
sram/synthesis/synplicity/rev_1/ddr_sdram.xrf
sram/synthesis/synplicity/rev_1/ddr_sdram_cons.tcl
sram/synthesis/synplicity/rev_1/ddr_sdram_rm.tcl
sram/simulation/work/altcam
sram/simulation/work/altclklock
sram/simulation/work/altlvds_rx
sram/simulation/work/altlvds_tx
sram/simulation/work/command
sram/simulation/work/control_interface
sram/simulation/work/ddr_command
sram/simulation/work/ddr_control_interface
sram/simulation/work/ddr_data_path
sram/simulation/work/ddr_sdram
sram/simulation/work/ddr_sdram_tb
sram/simulation/work/io_utils
sram/simulation/work/lpm_components
sram/simulation/work/mt46v4m16
sram/simulation/work/mti_pkg
sram/simulation/work/pll1
sram/simulation/work/std_logic_arith
sram/simulation/work/util_1164
sram/synthesis/synplicity/rev_1
sram/simulation/work
sram/synthesis/synplicity
sram/doc
sram/model
sram/route
sram/simulation
sram/source
sram/synthesis
sram
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