搜索资源列表
DEMO_V
- 黑金FPGA开发板（学生）测试程序 VHDL语言 包括led 按键 串口 lcd的检测-Black Gold FPGA development board (student) test procedures VHDL language, including the detection of serial lcd led key
uart_v
- VHDL串口程序,通过验证,识货的快下载,精品-VHDL serial procedures, validated,识货faster downloads, quality
uart
- 用vhdl实现的串口通信程序,可以综合并下载到FPGA运行.-Achieved using VHDL serial communication procedures, can be synthesized and downloaded to the FPGA to run.
myself_uart_vhdl
- 自己写的，对串口的VHDL描述，有完整testbench，特别是详细的功能说明和注释。-Wrote it myself, on the serial port of the VHDL descr iption of a complete testbench, in particular, detailed functional descr iptions and notes.
RS-232sender
- 一个串口RS-232 发送模块。基于VHDL语言。-A serial RS-232 send module. Based on the VHDL language.
VHDLSourceProgramofReadDAatasFromSRAM
- 从SRAM中读取数据并显示的VHDL源程序，了解串口通信的基本原理，了解VGA现实图像的方法和原理。-VHDL Sorce Program of Read Datas From SRAM
__FPGA_Prototyping_by_VHDL_Examples
- 在赛灵斯上用VHDL实现，串口，PS MOUSE, PS KEYBOARD..... 协议-on Xilinx,to achieve using VHDL too fullfill UART, PS MOUSE, PS KEYBOARD ..... prototype
uart
- fpga内嵌入双向串行通讯口 传输波特率可变 可通过查询方式确定发送接收状态 内置256字节发送接收缓冲区 -serial communication
innovateasia2009
- 串口uart的vhdl，verilog，lattic实现原码-The uart serial vhdl, verilog, lattic realization of the original code
serial
- 该程序用vhdl 编写，模拟串口工作，对上位机发送数据在串口调试工具下显示，接受上位机数据在数码管上显示-Vhdl prepared to use the program to simulate the serial port work, send data to the PC serial port debug tools in the next showed that IPC data in digital tube display
uart_vhdl
- VHDL语言的实现标准的UART串口,并可以多次例化成多串口的-The realization of VHDL language standard UART serial port
uart
- 用VHDL编写的RS232串口的通信程序-Written with the VHDL serial RS232 communication program
VHDL_32bit_timer
- VHDL写的32位计数，两个四位共阳数码管输出 串口输出+数码管显示的计时器程序 每次停止后串口输出。-VHDL to write 32-bit count, a total of two 4-yang control output serial digital output+ digital tube displays each stopped the timer program serial output.
Sequencedetector
- 序列检测器可用来检测一组或多组由二进制码组成的脉冲序列信号，这在数字通信领域有广泛的应用。当检测器连续收到一组串行二进制码后，若这组码与检测器中预制的码相同，输出为A，否则输出为B。序列检测I/O口的设计如下：设Din是串行数据输入端，clk是工作时钟，clr是复位信号，D是8位待检测预置数，QQ是检测结果输出端。-Sequence detector can be used to detect one or more sets consisting of binary code from the
UARTE
- 用VHDL语言编写的串口通讯模块，可以实现发送和接受功能。-A UART module writen in VHDL.
UART
- 通用UART串口的VHDL描述，可自行设定奇偶校验，波特率等参数-VHDL descr iption of generic UART serial port, they are free to set parity, baud rate and other parameters
chuankou
- 基于VHDL串口通信，包括原理图和VHDL输入-VHDL-based serial communication, including schematic and VHDL input
example
- 我FPGA开发板的程序！！！包括数、码管iic、VGA、乘法器、串口。加法器、比较器、状态机等等等了，主要是VHDL的也有部分好似Verilog的。参考下吧-verilog...vga..uart...add...etc..
UART
- 这是用VHDL语言编写的FPGA串口程序，希望对大家有用。-It is written in VHDL, FPGA serial program, we want to be useful.
uart
- 一个功能很强大的异步串口例子，用vhdl完成，波特率等参数可以调整。-A feature very powerful example of asynchronous serial interface, complete with vhdl, baud rate parameters can be adjusted.