搜索资源列表
fpgaUPDW
- fpga上下变频混频实现，其中CIC采用多种方法设计，自己花两个星期编写，中文注释，浅显易懂-fpga up and down conversion mixer implemented which CIC using a variety of methods designed, he spent two weeks writing notes in Chinese, easy to understand
ece5760-sdr-export
- cic filter example, vhdl dm9000a example for sdr receiver
cic_dec_8_three
- 用verilog语言实现一个3级、抽取率为2的8位hogenauer CIC抽取滤波器-Verilog language to achieve a 3, the extraction rate of 8 hogenauer CIC decimation filter
CIC_Compensation_Filter_Coefficients
- CIC补偿滤波器设计源代码，包含量化功能，可以作为FPGA开发滤波器设计数据。适用于CIC抽取和CIC插值滤波器的补偿滤波器应用。-CIC compensation filter design source code, including the quantization function can be used as a the FPGA development filter design data. Apply to CIC decimation filter compensation an
CIC
- image compression and decompression-image compression and decompression...
Verilog1
- 实现了cic分频功能，分频系数D可变2~32，代码用verilog编写，其中输入数据写入主程序中，便于后人testbench的编写-Cic divide divider coefficient D variable from 2 to 32, the code is written in verilog input data is written to the main program, to facilitate future generations testbench preparation
cic
- 积分梳状滤波器的硬件实现，主要是实现在允许范围内进行抽取滤波，实现数据压缩-failed to translate
filter-modeling
- MATLAB建模数字下变频的滤波器组设计，和幅频特性分析（cic级联补偿滤波器，和cic级联补偿滤波器和半带滤波器）-Digital down conversion filter bank design, analysis and amplitude-frequency characteristics of the the cic cascade compensation filter and the cic cascade compensation filter and half-band f
24CIC
- 基于fpga的抽取CIC滤波器设计,采用verilog编写，24抽取,仿真通过-Fpga-based CIC decimation filter design using verilog written, 24 extraction
interp_24_cic
- 基于fpga的插值CIC滤波器设计,采用verilog编写，24倍插值,仿真通过-Fpga-based interpolation CIC filter design using verilog write, 24x interpolation, through simulation
ciccomp
- 本代码可以实现CIC的抽取滤波功能，性能很好-This code implements the CIC decimation function, performance is very good
CIC_filter_implement
- 实现CIC抽取滤波器，在多速率通信中经常需要用到的CIC抽取滤波器-CIC decimation filter implemented in the multi-rate communications often need to use the CIC decimation filter
Harmonic_filter
- 一个自己整理的CIC梳状滤波器和调试数据。主要功能是可以滤除谐波。 方便好用，调整输入参数和数据源即可。-A CIC filter and the coresponding data. Parameter input and file name changes are the only you to do for your fun.
CICfilterSim
- CIC 滤波器的设计演示程序 可以运行的 还有分析性能-CIC filter design demo program that can run as well as to analyze the performance
cic_coe_cut
- CIC每级位宽计算，包括内插滤波器每一级位宽计算，抽取滤波器每一级位宽计算。-CIC Hogenaner bits calculation
DDC
- DDC 利用cIC和半带滤波器 抽取实现下变频
cic_filter
- 5阶cic滤波器 使用vdhl编写 下载后将tb代码烤出 新建，然后综合仿真！-5 cic filter using vdhl written order to download the code will tb baked New, and then integrated simulation!
CIC_4ORDER
- 4阶24倍抽取CIC滤波器的verilogHDL源代码，仿真测试代码及相关资料-4-order CIC decimation filter 24 times verilogHDL source code, simulation test code and related information
FPGA_CIC
- 用Count计数法实现5级CIC滤波器，能够提前或者延迟一个周期采样。能综合-Implementation level 5 CIC filter with Count counting method, one can advance or delay the sampling period.
1001-0548(2012)02-0208-04
- 宽带CIC抽取滤波器的一种改进方法1001-0548(2012)02-0208-04-Improved Method for Wideband CIC Decimation Filters