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Design-and-implementation-of-High-Speed-Pipelined
- Design and implementation of High Speed Pipelined DDR SDRAM memory Controller
atmel-sdramc
- Atmel (Multi-port DDR-)SDRAM Controller driver.
qcom-gcc-msm8660
- Header file for the Atmel DDR SDR SDRAM Controller.
ddr_sdr
- DDR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted to any other DDR SDRAM device-DDR SDRAM Controller Core - has been designe
ALI_M1621(71)
- M1671 - P4 Super North Bridge – CPU, AGP, PCI and Memory Controller The M1671 is a high-performance, high-value North Bridge that supports all Pentium 4 processors. With internal 128-bit architecture optimized for CPU bus, DDR and AGP4X
source
- 2. /qdr2/source/qdr2_io.v > Top level file includes declarations of HSTL1 and LVTTL I/O standards /qdr2/source/qdr2.v > Main module of the QDR memory controller /qdr2/source/pipeline.v > Pipeline module for increasing performance