搜索资源列表
CuFIFO
- fifo的vhdl代码,比较简单，适合初学。-fifo the VHDL code, is relatively simple, suitable for beginners.
FIFO
- 操作系统实践课程实验，页面置换的4种方法，FIFO等-Practice Course experimental operating system, page replacement of the four kinds of methods, FIFO, etc.
fifo
- fifo程序，供大家参考参考，给点意见，初次编写-fifo procedures for your information, to the point, the initial preparation of
fifo
- 在c环境下模拟操作系统中的先来先服务算法.-C simulation environment in the operating system of first come first serve algorithm.
FIFO1
- FIFO存储电路的设计与实现，用verilog实现fifo的参考设计-FIFO memory circuit design and realization of the realization of fifo with Verilog reference design
fifo
- 先入先出缓冲存储器，采用verilog hdl-FIFO buffer memory, using verilog hdl
2812SPIFIFO
- 使用spi fifo中断进行接受和cputimer中断里进行发送-Carried out using the spi fifo interrupt acceptance and interrupt cputimer conducted Send
asyn_fifo
- verilog编写的异步fifo源代码，asyn_fifo.v为顶层，调用其他四个文件-asynchronous fifo prepared Verilog source code, asyn_fifo.v for top-level, call the other four documents
ASYNCFIFOXPXMOD
- 任意时钟配比的异步fifo.含有synplify ip库中的双端口ram。用于处理多时钟域问题。-Arbitrary ratio of asynchronous clock fifo. Containing synplify ip library of dual-port ram. Used to deal with the issue of multi-clock domain.
usbin_v1.7
- 用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
fifo
- 页面置换先进先出算法，请大家试试，本人鉴定没问题-FIFO page replacement algorithm, please try, I did not identify the problem
FIFO
- 模拟页式虚拟存储管理地址转换和缺页中断，并用FIFO算法处理缺页中断。-Simulation of virtual storage management page address translation and page fault, and FIFO method to deal with page fault.
FIFO
- 课程设计报告_先进先出(FIFO)页面置换算法 里面全齐，不过是DOS的界面，希望对大家有些帮助 -Curriculum design report _ FIFO (FIFO) page replacement algorithm inside homogeneous whole, but DOS interface, I hope all of you some help
fifo
- 1.用随机数方法产生页面走向，页面走向长度为L(15<=L<=20),L由控制台输入。 2.根据页面走向，分别采用Optinal、FIFO、LRU算法进行页面置换，统计缺页率。 3.假定可用内存块为m(3<=m<=5)，m由控制台输入，初始时，作业页面都不在内存。 -1. Using random number methods to generate the page, the page length to L (15 <= L <= 20), L
AS_FIFO_DESIGN_Verilog
- 使用Verilog硬件描述语言完成了一个异步FIFO的设计，供相关硬件开发人员参考。-Verilog hardware descr iption language used to complete an asynchronous FIFO design, hardware development for the relevant reference.
fifo
- 可综合的Verilog FIFO存储器. This example describes a synthesizable implementation of a FIFO. -Can be integrated Verilog FIFO memory. This example describes a synthesizable implementation of a FIFO.
fifo_src
- verilog语言实现，利用BlockRAM实现FIFO。-Verilog language, the use of BlockRAM achieve FIFO.
vhdlfi
- fifo vhdl源码，高可靠性，带有格雷码同步，有需要可依进行参考！-fifo vhdl source, high reliability, with Gray-code synchronization, there is a need-based reference!
IPC_linux
- 源码包中是我在学习Linux进程间通信时所写的关于五种通信方式（管道，FIFO，信号，消息队列和共享内存）的程序，适合于初学Linux下应用开发的有志之士参考，希望对他们能有所帮助。-Source package is in my learning process communication when Linux on the five kinds of written communication (pipe, FIFO, signals, message queues and shared m
AutoFIFO
- EZ-USB的CY7C68013A实现Slave FIFO的AutoIN。关键配置见TD_Init函数。-EZ-USB