搜索资源列表
FIFO_2
- VERILOG Synchronous FIFO. 4 x 16 bit words.-VERILOGSynchronous FIFO. 4 x 16 bit words.
ImplementingFIFO-GPIF
- USB 2.0 FIFO 工作模式 C语言编程 CY7C68013单片机-USB 2.0 FIFO mode of C language programming CY7C68013 Singlechip
fifo
- 先进先出缓存器的verilog设计与实现-design of fifo(first in first out)
75448172geleicounter
- 这是异步fifo的vhdl实现代码，已经在FPGA上通过实践证明，运行状态良好-This is the asynchronous fifo realize the VHDL code has been adopted in the FPGA Practice has proved that running in good condition
Serial_FIFO_LPCARM
- LPCARM串口无限FIFO的实现源码。-Serial LPCARM unlimited source implementation of the FIFO.
bulkloop
- EZ-USB FX2 SLAVE FIFO模式固件代码-EZ-USB FX2 SLAVE FIFO mode firmware code
Apptest_write_read_fifo
- 采用EZ-USB GPD开发的USB FIFO测试程序-The use of EZ-USB GPD development of USB FIFO test procedures
clk
- 通过一个主时钟信号完成异步FIFO读写时钟信号的产生。编译通过实现功能。-Through a master clock signal the completion of asynchronous FIFO read and write clock signal generation. Compiler through the implementation function.
aaa
- FIFO、LRU、OPT的三个简单实现 源码 java -FIFO, LRU, OPT three easy source java implementation
fifo
- simulation fifo protocol
USB
- VC5416 对USB寄存器的读／写、配置； VC5416 对 USB的 FIFO 的操作； VC5416 对 USB的 setup 包的操作； VC5416 对 USB的 Endpointo 的操作；-VC5416 of USB register read/write, configuration VC5416 on the USB-FIFO operation VC5416 for USB operation of the setup packet VC5416
connect20090223
- fpga从FIFO读数据并上传到双口ram中。-FPGA read data from the FIFO and upload it to dual-port ram Medium.
fifo
- 实现fifo的基本功能。使用Verilog能够实现的同步数据先入先出功能，简单易懂，并带有相应的测试文件-Fifo realize the basic functions. Be able to use the Verilog implementation of the synchronous data FIFO functions, easy to understand, with the corresponding test file
Uart(FIFOSend.TimeoutReceive)
- AVR mega16/mega32的UART FIFO发送.超时接收,广泛应用于工业控制.这是原创作品.-AVR mega16/mega32 send the UART FIFO. Overtime receiver is widely used in industrial control. This is the original works.
ram
- a 16 by 4 ram is used for many applications as a basic component such as fifo and stack etc
rtl
- 液晶model 设计LCD 并口模式下的仿真model-LCD FIFO model
XQueue_demo
- 通过内存文件映象实现了一个FIFO消息队列，可以工作在所有的windows版本中,很好用的完成内存共享服务的代码-a FIFO message queue with memory map,compatible all windows version.
dmapara.ZIP
- Very fast file transfer over the parallel port, using dma and fifo, fast and slow methods. It works in dos and windows. It works in nt , if you use a program to open the ports so as winio. I have achived rates of 750 kbytes/sec in the fifo mode. The
fifo_core
- 经典的FIFO实现源码，里面有三种类型，是xilinx工程师写的，经典-Classic source FIFO implementation, there are three types, are written by xilinx Engineer, classical
asynFifo
- 异步fifo在IC设计中，非常重要；是异步时钟域同步方法-Asynchronous fifo in IC design, is very important are asynchronous clock domain synchronization