搜索资源列表
USB_fx2_engine
- This code is the VHDL source code of the USB communication between FPGA device and host device(PC).
USB_SoftLock
- USB SoftLock, 包含VHDL for Xilinx FPGA，上位机驱动以及应用程序-USB SoftLock, Include VHDL for Xilinx FPGA, PC Driver and App
ztex-131030
- ZTRX FPGA SDK for usb fpga with spartan 6
nexys4-ddr_sw_demo
- The Nexys4 DDR board is a complete, ready-to-use digital circuit development platform based on the latest Artix-7™ Field Programmable Gate Array (FPGA) Xilinx® . With its large, high-capacity FPGA (Xilinx part number XC7A100T-1CSG324C)
FPGA_USB_Communication
- 本软件利用USB控制芯片cy7c68013A实现了USB通讯。压缩文件包括在fpga里面编程的vhdl软件-This software uses the USB control chip cy7c68013A to achieve the USB communication. The compressed file include programming in FPGA VHDL software
FIFOonFPGAtoUSB
- 这个一个基于FPGA的FIFO的传输资料，可以用在USB的传输上，里面有视频有源代码，还有估计的设计，相关的文档说明等等。-The transmission of a data FIFO of FPGA-based, can be used on USB transmission, which has a video source code, as well as estimates of design, related documentation, and so on.
USB_GPIF-II
- fpga模拟两路视频，简单拼接后，经过GPIF II接口传出给cy2014，测试usb的吞吐量-fpga generate two lane video, and transmit them through GPIF II interface. test cy2014
Firmware
- GCU的固件，实现USB FPGA 和TCP/IP协议～(GCU firmware to implement USB, FPGA and TCP/IP protocols ~!)
13_usb_test
- READ 16BIT DATA FROM EP2 FIFO AND SEND TO EP6 FIFO
usb2.0调试助手
- 基于usb2.0的C++上位机，实测可用，仅供参考(USB2.0 based C++ upper computer, measured available, for reference only.)
cypress硬件设计指南
- 赛普拉斯的EZ-USBFX3™是新一代USB 3.0 外设控制器，可提供集成且灵活的功能。FX3 具有一个可进行完全配置的并行通用可编程接口GPIF II，它能够与任何处理器、ASIC 或FPGA 连接。它可轻松无缝地连接到多种常用接口