搜索资源列表
photo_verilog
- verilog开发的电子相册系统，是基于Altera的FPGA芯片和IP核的设计！-Verilog developed electronic album system is based on Altera s FPGA chip and IP core design!
AltrFir32
- 借助于altera公司的IP核，在FPGA中使用dspbuilder实现32位低通FIR滤波器功能，-Altera With the company
dds_using_FPGA
- 利用FPGA实现DDS经过编译没有错误。编译环境为QuartusII7.2，该环境集成了IP核，可以提高开发效率。-FPGA realization of the use of DDS compiled no errors. Compiler environment QuartusII7.2, the environment integrated IP core, can improve the development efficiency.
VERILOG_VERSION_PIC16C57
- VERILOG VERSION PIC16C57 是一个用于FPGA模拟PIC16C57的IP核，有帮助文件，介绍了如何测试使用这个IP核。用VERILOG语言编写的。-VERILOG VERSION PIC16C57 is a PIC16C57 for FPGA simulation of the IP core, has helped document describes how to test the use of the IP core.
ip_core1
- 用于fpga的sopc的ip核，是学习ipcore编码的好教程-For the FPGA of the SOPC ip nuclear, IPCore study are a good encoding tutorial
TheResearchAndIPDesignOfSMBusBasedSmartBattery
- 本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。-This paper studies the SMBus specification, based on the introduction of the typical system
9_fft
- 利用FPGA的IP核来实现fft的设计-The use of FPGA to realize the IP core design fft ,,,,,
DW8051(Verilog)
- 51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
video_controller
- 可用于FPGA的IP核，适用视频控制领域。-FPGA can be used for the IP core, the application of video control.
200704252
- fpga design, give you a brief idea or concept of how the network functions-ethernet basic concept, from osi 7 layer to tcp ip, easy to learn network technology in a single step!
RealizationofdigitaldownconversionbyFPGA
- 介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the prepa
shiboqi(chugao)
- 这个方案是在FPGA中嵌入51单片机IP核，通过51单片机的控制来很方便的实现对数字存储示波器的显示和控制！是我国赛训练的一个题目！-This program is embedded in the FPGA microcontroller IP core 51 through 51 SCM control to easily realize the digital storage oscilloscope display and control! The training of our race
FPGA51he
- 这是一个51单片机嵌入在FPGA中的ip核，这个核它完全兼容我们普通的8051单片机，也就是说程序在这个上面一样可以跑起来-This is a 51 microcontroller embedded in the FPGA in the ip core, the core is fully compatible with our ordinary 8051, that the program can run up the same as above
I2CSLAVE
- 已经验证过的I2C，slave的IP，core，从一开源网站下载的，代码写的非常好，节省了FPGA的资源，比起以往的slave的CORE，这个CORE减少了寄存器的使用。-Has been verified I2C, slave of the IP, core, from an open source website, the code is written in a very good save FPGA resources than the previous slave of CORE, t
mouse_ps2
- 基于FPGA的鼠标驱动程序，该鼠标基于PS2协议，可以做成IP核，用于嵌入式当中。-FPGA-based mouse driver, the mouse protocol based on the PS2 can be made IP cores for embedded them.
8051_latest
- 8051ip核，可用于ic设计和FPGA的软ip核使用-8051ip nuclear, can be used for ic design and FPGA soft-core use of ip
WeatherChannel
- IP-over-RS232 enabled weather station, C code, code for FPGA and hardware schematics.
PWM_IP
- 电源控制系统的PWM核,测试可用...FPGA-Power IP,PWM
IPSec
- IP Sec安全网卡上消息认证模块的FPGA实现，-IP Sec security card on the Message Authentication Module FPGA,
I2C_code
- 与IP核配套的I2C-Master Core，包含了目前主流FPGA芯片的I2C实现，代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。-I2C-Master Core