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MC8051 IP Core
- 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware descr iption language can be downloaded to the FPGA / CPLD as a system-on-chip processor
fpga 8051单片机IP核
- fpga 8051单片机IP核。This is version 1.3 of the MC8051 IP core-8051 IP core. This is version 1.3 of the IP core MC8051
sdram_vhd_134
- This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
PIC10_RISC_Verilog
- The PIC10-compatible microcontroller core was implemented as part of a client project where a small PIC-compatible microprocessor IP Core was needed to be integrated into a CPLD or FPGA. This allowed extremely fast but yet simple firmware programming
IP
- this a programme about dsp ,it can achieve tcp/ip communication ,the programme is corect ,i wish that you can download it .-this is a programme about dsp ,it can achieve tcp/ip communication ,the programme is corect ,i wish that you can dow
IP-Camera
- 基于Altera公司的FPGA设计的网络IP Camera方案，具有参考价值。-Altera s FPGA-based Network IP Camera solution designed with a reference value.
CPCI_PCIbus
- 为构建一个紧凑、灵活的 CPC I系统,在 IP核的基础上,采用 FPGA来实现 PCI总线接口电路。-To construct a compact and flex ible CPC I syste m, the PCI i nte rface c i rcuit i s i mp l em ented by FPGA based on IP core。
ip_core
- 一些FPGA上用的到的IP核,种类非常全,开发小的ASIC基本上够用了-To use some of the FPGA IP cores, species are very full, the development of ASIC basically small enough
8051-IP-Core
- 8051的IP核，可以使用FPGA IP节点导入此IP核，实现单片机的功能。-8051 IP core can be used the FPGA IP node to import this IP core microcontroller functions.
fpga-fft
- xlinx fpga实现fft功能，利用ip核，包含源程序及完整工程文件，直接就能使用-The fft function xlinx fpga ip-core contains the source code and complete the project file, and can be used directly
CAN-Bus-IP-Core
- ＦＰＧＡ中ＣＡＮ总线的ＩＰ核，加入工程中既可以使用。-CAN bus in FPGA IP, can be used to join the project
FPGA-IP
- FPGA的宏模块介绍，主要是IP核的应用简单介绍-FPGA macro module introduces mainly the application of IP core brief
SPWM
- 利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)
SPWM信号产生系统IP软核设计及验证
- 针对电力电子领域的需求，采用自然采样法设计了一个全数字三相SPWM信号产生系统IP软核．通过数字频率合成技术实现了对电源频率的辅确控制．使电源频率精度达到16位．其中。通过调节控制参数．分别实现了电源频率与载波频率的7级、8级控制．最后。搭建了基于FPGA的测试系统．验证了系统功能的正确性．(According to the requirement of power electronics, the natural sampling method for the design of a full
cordic_ds249
- FPGA开发过程中的IP核，用于计算正弦，余弦和正切等。(IP core used in FPGA design to calculate cos and sin.)
浮点数加法ip
- 这是两个浮点数实现加法的ip，用于硬件描述语言。这是组内做机器人项目时自己编写使用的。
fifo_test
- fifo IP测试工程，有完整的testbench 直接编译仿真即可(FIFO IP test project, completed testbench .direct compilation and simulation)
Xilinx IP核详解和设计开发
- Xilinx IP核详解和设计开发 ，对于学习FPGA的同事非常有帮助(Xilinx IP nuclear detailed interpretation and design and development is very helpful for the colleagues to learn from FPGA)
iir_2n_ip_float_demo
- 使用altera提供的ip核，实现了浮点数运算的2阶iir滤波器，结果与matlab运算结果相同。(Using the IP core provided by Altera, the 2 order IIR filter of floating point operation is implemented, and the result is the same as that of MATLAB operation.)
国产FPGA参考设计IPCORE_UART_example_M5&M7
- 国产FPGA的UART参考设计IPCORE源代码。 The IP provides two kinds of simplified interface connected to EMIF bus and AHB bus for communication with 8051 core and ARM core.The two kinds of interface are full-duplex serial communication interface. Support programmabl