搜索资源列表
NIOSII_VGA_Controller
- Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions
image_combine_v
- 用于在FPGA中实现图像叠加字幕，字符为FPGA内部rom存储的点阵。-combine word on video stream in FPGA
VGA_RGB_color-bar
- FPGA EP4CE40F23C6 VGA显示RGB彩条实验 学习视频的时序-FPGA EP4CE40F23C6 VGA display RGB color of experiential learning video timing
DE2_115_TV_TO_VGA
- PROGRAM FOR DECODING SIGNAL VIDEO ABOUT FPGA
MT9V032
- PROGRAM FOR DECODING SIGNAL VIDEO ABOUT FPGA
VideoDecod
- 本程序是视频图像处理的前期部分，功能是通过FPGA控制SAA7113实现视频解码，讲模拟全电视信号转变为数字视频信号，为后期的图像处理算法做准备。-This program is part of the video image pre-processing functions are realized by FPGA control SAA7113 video decoder, speaking analog composite video signal into a digital video
FPGA_GigE
- 文章描述基于FPGA的千兆网实现方法，传输视频数据，采用UDP协议，速度千兆以上-The article describes the FPGA based gigabit network implementation method, the transmission of video data, the use of UDP protocol, the speed of Gigabit
driver-fatigue-detection-system
- 基于FPGA的疲劳驾驶检测系统设计。本系统集图像采集、存储、算法处理、报警于一体。利用FPGA并行处理数据的特 点使系统检测速度达到了视频源25帧／秒的速度，满足了实时性要求。该系统检测准确 率较高、体积小、功耗小、成本低，市场前景广阔。-Driver fatigue detection system based on FPGA design. The system combines image acquisition, storage, processing algorithms an
FPGADisplay
- 由ISE开发的FPGA工程文件，显示相关，包括视频接口，用Verilog开发，可以参考学习-ISE developed by the FPGA engineering documents, display related, including video interface, using Verilog development, you can refer to learning
mt9d112_ddr2
- 镁光MT9基于FPGA图像采集模块，该模块可同时采集两路视频信号。其包括完整的时序和接口、ddr2内存数据写入和存储、qsys系统的搭建、FPGA与NIOS II联合设计-Micron MT9 based on FPGA image acquisition module, the module can simultaneously capture two video signals. Including the complete timing and interface, ddr2 memory
HDMI_4AV
- 该源码为基于FPGA的HDMI显示的一拖四的AV视频采集。该模块可方便移植在需要使用HDMI高清显示的场合，并且可将VGA显示一分为四，方便各个窗口显示不同的图像信息-The source for the FPGA-based HDMI display of a four of the AV video capture. The module can be easily transplanted in the need to use the HDMI high-definition displa
EIA-CEA-861-B(timingaEDID)
- 视频信号格式标准，fpga视频编解码， EIA CEA-861-B(timing&EDID)-Video signal format standard
sdi_3g_hd_sd_code
- SDI格式视频产生代码，fpga编码，里面有3个文件分别对应3g,hd,sd信号，给不同的时钟就可以直接用了-SDI format video generation code
FIFOonFPGAtoUSB
- 这个一个基于FPGA的FIFO的传输资料，可以用在USB的传输上，里面有视频有源代码，还有估计的设计，相关的文档说明等等。-The transmission of a data FIFO of FPGA-based, can be used on USB transmission, which has a video source code, as well as estimates of design, related documentation, and so on.
sdram_ov7670_vga
- 基于FPGA的CMOS摄像头视频采集传输，lcd显示。-FPGA-based CMOS camera video capture transmission, lcd display.
Cam_Cap
- 基于Lattice ＦＰＧＡ的视频图像采集与ＶＧＡ输出-Video Image Acquisition and VGA Output Based on Lattice FPGA
USB_GPIF-II
- fpga模拟两路视频，简单拼接后，经过GPIF II接口传出给cy2014，测试usb的吞吐量-fpga generate two lane video, and transmit them through GPIF II interface. test cy2014
VGA
- vga code for fpga 3s500e spartan xilinx code verilog tutorial video graphics array in verilog interfacing with fpga xilins spattan 3e very easy to learn
adv7123
- adv7123是常用的视频解码器，常常可用fpga编程控制，使其输出ntsc、pal制式，或者vga显示，这里面全是关于这方面的论文，很值得借鉴参考。(Adv7123 is a commonly used video decoder. It can often be controlled by FPGA programming, so that it can output NTSC, PAL format or VGA display, which is all about the papers
DE2_115_D8M_RTL
- 关于一个视频采集系统的源码，可搭载FPGA板子直接使用(About a video capture system source code, can be equipped with FPGA board directly use.)