搜索资源列表
Video-de-interlacing
- 两篇有关视频去隔行的论文，分别是算法研究和fpga实现，挺不错的-The two video deinterlacing papers, algorithm research and FPGA to achieve very good
DE0_VGA
- FPGA的视频接口程序 核心芯片是cyclone III EP3C16F484-FPGA-video interface program
osd_driver
- Xilinx FPGA的视频处理IP核 OSD的驱动程序，很好用！-Xilinx FPGA video processing IP core OSD driver, very good!
Video-images-of-four-Quad-FPGA
- 在中国知网上下载的内容，主要是当前利用fpga进行图像的分割技术。-In China known online downloadable content, mainly the current use of fpga image segmentation techniques.
fpga--vidao-
- 基于FPGA的图像视频采集的算法——几篇论理论分析文档-FPGA-based algorithm for image video capture- Several Theoretical analysis of documents
FPGA--HD-video-de-interlacing
- <用FPGA实现高清视频去隔行功能> 本白皮书介绍各种去隔行技术，以及怎样使用Altera 的视频和图像处理IP 包来实现这些技术。采用视频设计方法，设计人员在实现不同的去隔行算法时，能够综合考虑各种硬件方案。-Using FPGA to achieve HD video de interlacing function
ts78xx-fpga
- Video for Linux Two controls header file.
xapp1205-high-performance-video-zynq
- Xilinx FPGA平台Zynq ZC702下AXI vdma IP核应用工程。-An Axi vdma ip application project based on Xilinx Zynq ZC702 platform.
exp4_gamma_correction
- 使用视频板上FPGA——EP3C16F484C6（Altera-CycloneⅢ），以及与FPGA相连的视频信号转换芯片SiI7171和SiI7170芯片。 图像信号由计算机通过SiI7171输入至FPGA，在FPGA 上进行图像信号Gamma变换图像处理（γ 1.0, γ 2.5, γ 2.8）之后，再通过上路SiI7170输出到显示器显示。-Using the video board FPGA- EP3C16F484C6 (Altera-Cyclone Ⅲ), and connected w
OV7670_DDR2_VGA
- 在FPGA下的视频采集显示，采用纯Verilog编写，其中包括有OV7670摄像头，高速存储器DDR2，ADV芯片的VGA。-In FPGA video capture display, using pure Verilog prepared, which includes OV7670 camera, high-speed memory DDR2, ADV chip VGA.
dtysky-FPGA-Imaging-Library-c8cd350
- 一个hls视频库ip libraries，里面包含各种功能的ip核，可进行复用。-A hls video library ip libraries, which contains a variety of functions of the ip core can be reused.
Nexys4FFTDemo-master
- A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT output
verilogiic1121
- tvp5150视频解码，平台quartus II(tvp5150 Video decoding,quartus II)
tnn7_code_201212141110
- 人脸检测与跟踪是一个重要而活跃的研究领域，它在视频监控、生物特征识别、视频编码等领域有着广泛的应用前景。该项目的目标是在FPGA板上实现实时系统来检测和跟踪人脸。人脸检测算法包括肤色分割和图像滤波。通过计算被检测区域的质心来确定人脸的位置。该算法的软件版本独立实现，并在matlab的静止图像上进行测试。虽然从MATLAB到Verilog的转换没有预期的那样顺利，实验结果证明了实时系统的准确性和有效性，甚至在不同的光线、面部姿态和肤色的条件下也是如此。所有硬件实现的计算都是以最小的计算量实时完成的
video2_hdmi_net_audio2
- 视频图像 lattice fpga 约束文件(Video image, lattice, FPGA, constraint file)
color_bar
- 使用verilog编写的模块，输出1080p彩条测试视频，输入时钟频率可以为74.25M或者148.5M(The use of Verilog module, 1080p color video output test, input clock frequency is 74.25M or 148.5M)
嵌入式视频处理基本原理-中文版
- 嵌入式视频处理基础，对各种视频格式及视频数据流信号解码与编码进行了详细的介绍，做视频处理不可多得的工具书(Embedded video processing basis, a variety of video formats and video data stream decoding and coding are introduced in detail, very helpful for video processing)
pid-fpga-vhdl-master
- 6. Show how accurate your predicted model is, also explain in what situation and why it does (not) perform that well (in report and video). 7. If you re-train the network for your own custom images, you can choose different training options. Explain
VGA_to_DVI
- 采用Verilog语言将VGA视频信号转化成DVI视频信号，实现视频信号的转化(Using Verilog language to transform VGA video signal into DVI video signal and realize the transformation of video signal)
CH14_RGMII_UDP_TEST
- 用xilinx的SPARTAN6 实现的UDP，可通过PC机网络抓包工具进行发送和接收，增加了网络视频传输的接口，具有很好的参考价值(With the Xilinx implementation of the SPARTAN6 UDP, can be sent and received through PC network capture tools, increase the network video transmission interface, has a good reference