搜索资源列表
发布15个Altera的IP的源码
- ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
8-bit-mcu-ip-core-design-and-verification
- 万方数据库中载的,关于IP核设计和验证方面的论文-popular database containing, for the IP core design and certification papers
IP-DAC
- 描述了一个8位二进制输入的DAC 文章中包含源代码 采用数字化技术、在测控系统中用IP核实现D/A转换,并且在1片可编程逻辑器件中实现。它不受温度的影响,既可保持高分辨率,又可降低对电路精度和稳定度的要求,并减少元件的数量。
ip
- 15个免费的ip核包含avr core,core arm核
USB_1.1IP核
- 这是USB的一个机遇FPGA的IP核设计。欢迎大家使用
usb11.rar
- 基于verilog HDL的一个USB 1.1的IP 核,内有详细文档说明。,Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
Character_LCD.zip
- 这是一个 NIOSII系统的 1602LCD 控制IP核,This is a system NIOSII nuclear 1602LCD control IP
FPGA.rar
- 利用FPGA的51 IP核实现与单片机和ARM的串口通信,FPGA connect with MCU and ARM
C8051IP.rar
- FPGA应用,51单片机的IP核,在FPGA中嵌入单片机的源代码,FPGA applications, 51 MCU IP core, single-chip embedded in the FPGA source code
FSK
- 利用FPGA内的IP核来实现FSK,Using FPGA to realize the IP core FSK。-Using FPGA to realize the IP core FSK,
cordic_ds249
- FPGA开发过程中的IP核,用于计算正弦,余弦和正切等。(IP core used in FPGA design to calculate cos and sin.)
FSK
- 首先利用IP核记录sin和con波形,然后进行FSK调制,信息为数字信息(Firstly, the IP kernel is used to record the sin and con waveforms, and then the FSK is modulated, and the information is digital information)
dac_controller
- 以ip核的形式来控制数模转换芯片,减少cup开支。(dac controller ip /dac controller)
simon_IP
- 实现总线加密或解密的IP核(APB总线)(含tb测试平台)(Realization of encryption and decryption of IP core (APB bus))
iir_2n_ip_float_demo
- 使用altera提供的ip核,实现了浮点数运算的2阶iir滤波器,结果与matlab运算结果相同。(Using the IP core provided by Altera, the 2 order IIR filter of floating point operation is implemented, and the result is the same as that of MATLAB operation.)
USB2.0的IP核(详细verilog源码和文档)
- USB2.0的IP核(详细verilog源码和文档).rar
基于xilinx ip 核的千兆以太网代码
- 基于xilinx ip 核的千兆以太网代码,利用tri_mode_ethernet_mac实现了千兆以太网的数据收发
HDMI编码ip核
- verilog语言编程,HDMI解码输出ip核
pynq的h264 demo 开源的复旦h264 ip核
- pynq的h264 demo 开源的复旦h264 ip核
ip核
- softing网站的有关altera的EtherCAT ip核相关资料