搜索资源列表
my_1602(can-use)
- 基于ise的1602测试程序，verilog，亲测可用-Ise of 1602 based test procedures, verilog, pro-test available
led_shift
- 在xilinx的ISE上写的LED灯移动的verilog程序-a verilog code for led-shifting which writed with ise 14.2
it
- 用ISE开发的基于verilog语言的小游戏-ISE development based on the Verilog language games
ISEuart
- 实现串口通信，Verilog语言，ISE开发环境，实现8字节的传输-Uart transition
uart2
- 基于Xilinx ISE的uart传输代码，使用verilog语言完成-Based on Xilinx ISE uart transmission code, completed with verilog language.
clock
- 原创数字钟verilog程序，能实现数字钟基本功能，如：计数，跑表，定时，闹钟。用于ISE软件。-Original digital clock verilog procedures, to achieve the basic functions of digital clock, such as: counting, stopwatch, timer, alarm clock.
cache
- verilog 语言写的一个cache 平台是xillix ISE 实现了从cache中取指令命中和缺失情况的处理 -Verilog language to write a cache Platform is ISE xillix The processing of the instruction hit and the missing the cache is realized.
pll
- 一个基于FPGA的载波同步环的设计，开发语言Verilog，开发工具ISE 14.7，可用于FM接收机中，典型SDR项目-An FPGA-based carrier synchronization loop design, development language Verilog, development tools ISE 14.7, FM receivers can be used, typically SDR project
Chapter4-Sample
- I2C的verilog程序，应用ise软件开发，对于相关设计人员具有一定参考价值参考-The verilog I2C program, application of ise software development, has a certain reference value for the reference for related design personnel
Triangle
- 在ISE环境下，使用Verilog语言，编写三角波程序，运用ModelSim进行仿真。-In the ISE environment, use Verilog language, written in a triangular wave program, using ModelSim simulation.
1-example_led_4
- Verilog编写的计数闪灯，FPGA实验板，Xilinx ISE实验环境-Verilog prepared by flash count, FPGA experimental board, Xilinx ISE experimental environment
1-example_led_5
- Verilog编写的移位闪灯（跑马灯），FPGA实验板，Xilinx ISE实验环境-Verilog prepared by a shift flash (marquees), FPGA experimental board, Xilinx ISE experimental environment
clk_generator
- 时钟分频的verilog代码，能够实现小数分频，文件为Xilinx ISE工程文件-Frequency clock divider verilog codes, it is possible to achieve fractional file to Xilinx ISE Project Files
i2c_lightsensor
- 用Verilog HDL编写的光敏传感器AD/DA程序，AD结果显示在LCD上，DA结果控制LED的亮度，相关软件：ISE Design suit，硬件：xilinx FPGA开发板-Verilog HDL prepared with light sensors AD/DA program, AD results are displayed on LCD, DA of controlling LED brightness, software: ISE Design suit, hardware:
QPSK
- 这是用ISE编写的verilog语言的QPSK调制的代码-This is the QPSK modulation verilog language written with ISE code
conv_encoder(rate=1_2)
- 这是用ISE编写的verilog语言1/2码率的卷积编码的代码-It is written in verilog language ISE convolution coding rate 1/2 code
OFDM_MODU
- 基于verilog的16qam调制的程序，调试通过，有需要可以下载来参考,基于ISE软件-Based verilog of 16qam modulation process, debugging through, there is a need to download reference
my_i2c
- 基于FPGA的i2c通信，使用Verilog hdl实现，带有功能说明文档、ise工程、modelsim仿真工程-i2c communication based FPGA using Verilog hdl implementation, with the function documentation, ise project, modelsim simulation project
full_adder
- 用verilog语言编写的全加器模块代码，在ISE软件环境下编译开发，希望对大家有所帮助！-With verilog language full adder module code in ISE software compiler development environment, we want to help!
sp6ex14
- verilog,ISE工程。倒车雷达实例，每100ms产生1个超声波测距模块所需的10us高脉冲激励，并用数码管以16进制数据显示经过滤波处理的回响信号的高脉冲计数值（以10us为单位），与此同时，蜂鸣器根据障碍物远近，也会相应的发出不同频率的响声。-verilog, ISE project. Reversing radar instance, every 100ms high pulse generating 10us required an ultrasonic ranging module