搜索资源列表
Sdram_Control_4Port
- verilog 编写的sdram控制代码，很好的参考例子-sdram verilog write control code, a good reference example
SDRAM_0
- verilog写的sdram控制测试程序，测试成功了，可以直接在飓风2上跑-sdram verilog write control testing procedures, the test is successful, you can run directly on the Hurricanes 2
Sdram_Control_4ports
- 这是去隔行程序里的一个模块，主要是做sdram的4口控制的连接。-This is a de-interlacing program module sdram four control connection.
FPGA_SDRAM_ReadAndWrite
- SDRAM读写控制的实现与Modelsim仿真-Implementation and Modelsim SDRAM read and write control simulation
verilog_sdram
- I used code verilog. Synchronous dynamic random access memory (SDRAM) is dynamic random access memory (DRAM) that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to
yuanchengxu
- DMC-9263-E采用基于ARM926EJ-S内核的ATMEL处理器AT91SAM9263, 运行频率200MHz。板载64MB的SDRAM，64MB的Nand Flash，2MB的Data Flash。DMC-9263-E嵌入式开发系统外设非常丰富，功能强大，可扩展性强，低功耗。适用于纺织行业、数控行业、汽车电子、工业触摸屏控制系统、机器人视觉、媒体处理无线应用、数字家电、车载设备、通信设备、网络终端等场合。支持嵌入式Linux和WINCE5.0操作系统。 采用Linux2.6.20内核
DMC2440H
- DMC-2440-H采用基于ARM920T内核的Samsung处理器 S3C2440A, 标准主频400MHz，最高主频可达533MHz。采用64MB的SDRAM，2MB的NOR FLASH和64MB的NAND Flash。DMC-2440-H嵌入式开发系统外设非常丰富，功能强大，适用于各种手持设备、消费电子和工业控制设备的开发。支持嵌入式Linux和WINCE5.0.NET操作系统。 采用Linux -2.6.134内核，LINUX驱动支持：DM9000 网卡、串口、RTC、LED、按键、
DMC2440F
- DMC-2440-F采用基于ARM920T内核的Samsung处理器 S3C2440A, 标准主频400MHz，最高主频可达533MHz。采用64MB的SDRAM和64MB的Nand Flash。DMC-2440-F嵌入式开发系统外设非常丰富，功能强大，适用于各种手持设备、消费电子和工业控制设备的开发。支持嵌入式Linux和WINCE5.0.NET操作系统。提供完整的Wince5.0 BSP。 采用linux-2.4.18内核，支持多种文件系统,像cramfs、yaffs2、ext2、Fat
2440G
- DMC-2440-G采用一款基于ARM920T 内核的CPU S3C2440A-40构成一个完整的嵌入式系统开发平台。S3C2440A-40主频达到400MHZ，提供64M的SDRAM和256M的NAND FLASH，以及丰富的外设接口。该平台适用于GPS，PDA，MID，移动电视，智能手机，手持设备，平板电脑和广告机等消费类电子产品以及工业控制等领域。支持LINUX2.6和WinCE5.0操作系统。 WinCE5.0驱动支持：IDE/ATA， IIC，USB 摄像头,SD卡, USB 无线
DE2_115_CAMERA
- cycloneIV开发板完成图像数据采集，色彩空间转换，SDRAM存取数据，VGA控制等-CycloneIV development board to complete the image data acquisition, color space conversion, SDRAM access to data, VGA control etc
sdram_src
- 基于FPGA的读写控制，sdram，简单易懂，verilog代码描述-FPGA-based read and write control, sdram, easy to understand, verilog code Descr iption
LCDandSDRAM-test
- 一个SOPC实验，关于LCD的控制和SDRAM的使用方法-A SOPC experiment on LCD of control and the use of SDRAM
FIFO
- FIFO先进先出，控制时序，对urat、SDRAM、DAC等时序理解都有帮助-FIFO FIFO control the timing of urat, SDRAM, DAC and other timing understanding have helped
DDR3L_H5TC4G4(8_6)3AFR
- The H5TC4G43AFR-xxA, H5TC4G83AFR-xxA and H5TC4G63AFR-xxA are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operatio
part1
- The experimental control development board to complete the above SDRAM read and write capabilities. SDRAM write data inside first and then read out the data to compare, if you do not match the changes on the adoption of LED light show, and if agree
qingkei
- 加入重复控制，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，使用大量的有限元法求解偏微分方程。- Join repetitive control, Implemented with SDRAM run nios, while saving camera data SRAM, Using a large number of finite element method to solve partial differential equations.
qannai_v21
- 使用matlab实现智能预测控制算法，最小均方误差（MMSE）的算法，实现用SDRAM运行nios，同时用SRAM保存摄像头数据。- Use matlab intelligent predictive control algorithm, Minimum mean square error (MMSE) algorithm, Implemented with SDRAM run nios, while saving camera data SRAM.
jengyiu
- 包括轨道机动仿真、初轨计算,DC-DC部分采用定功率单环控制，实现用SDRAM运行nios，同时用SRAM保存摄像头数据。- Including orbital maneuvering simulation, initial orbit calculation, DC-DC power single-part set-loop control, Implemented with SDRAM run nios, while saving camera data SRAM.
yeifou_v62
- 经典的灰度共生矩阵纹理计算方法，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，DC-DC部分采用定功率单环控制。- Classic GLCM texture calculation method, Implemented with SDRAM run nios, while saving camera data SRAM, DC-DC power single-part set-loop control.
tenglui_V4.6
- 实现用SDRAM运行nios，同时用SRAM保存摄像头数据，三相光伏逆变并网的仿真，包含飞行器飞行中的姿态控制，如侧滑角，倾斜角，滚转角，俯仰角。- Implemented with SDRAM run nios, while saving camera data SRAM, Three-phase photovoltaic inverter and network simulation, It comprises aircraft flight attitude control, such a