搜索资源列表
FPGA_Prototyping_Verilog
- 基于xilinx spartan 3的Verilog HDL开发详细的介绍以及实战，这本书没用枯燥的理论来讲述Verilog HDL而是用具体的芯片型号来演示Verilog HDL的强大-Development described in detail as well as actual combat, this book is useless boring theories about the Verilog HDL but with a specific chip model to demon
ps2files
- Project descr iption for a VHDL mouse ps2 interface for the spartan 3 e board. do not take this into consideration because it s null i just only want to activate my account
calculator
- 这是一个设计16位计算器，运用Verilog HDL语言编写，可以实现简单的加减法计算。并且可以在Xilinx91i上仿真。其中 top.v文件为目录，calculator.v为计算器设计，display.v为显示设计，divclk.v为分频设计，keypad.v为键盘设计，并且testkeypad.v为检测程序。-design a 16-bit calculator using the Spartan 3 FPGA on the Digilent circuit board, with an
DigiClock_v1.0
- 多功能数字钟：包含默认模式、设置模式、闹钟模式和跑表模式。已在ISE10.1工具烧录成功，烧录开发板Xilinx Spartan 3 xc3s400 pq205 speed -4 开发板烧录成功-Multi-function digital clock: contains the default mode, setting mode, alarm mode and stopwatch mode. The source code has been successfully burned in IS
PicoBlaze
- PicoBlaze blinking LED, VHDL language, Spartan 3
top_ps2_ur_12.3
- 利用spartan 3E开发板实现鼠标和PS2之间的通信，在调试助手上用1,2分别显示鼠标的单双击-Using Spartan 3E development board realize the communication between the PS2 and, in the debugging with 1,2 respectively display the mouse Dan Shuangji
uart_12.3
- 基SPARTAN 3E，开发环境12.3X，实现UART驱动-SPARTAN 3E, 12.3X development environment, the realization of UART driver
fifo_config
- This the fifo made fot Xilinx, spartan 3-This is the fifo made fot Xilinx, spartan 3
digita_clock
- spartan 3 7 segment clock display
Interfacing_RTC_with_Spartan-3_Primer_FPGA
- Interfacing RTC with spartan 3
VGA---Spartan-3
- VGA - FPGA xilinx -VGA - FPGA xilinx ----------------
FA
- full adder for It can be implemented in Xilinx FPGA spartan 3 board.
tn2905_ecc_module
- TN-29-05: ECC Module for Xilinx Spartan-3 Micron ECC Module Features and Characteristics
VGA_SYNC
- VGA_SYNC is a part of VGA controller, base d on Spartan 3 chip, use for show bar color picture in screen
simu01
- spartan 3 series ADC vhdl code testbench
leds
- leds, vhdl spartan 3 nexys2
lcd
- implementation of 16x2 lcd module driver in vhdl with the scroll a read facility.also a memory device is been also added.for 576 charecter in spartan 3 device tested.
work_1
- spartan 3e-500 lcd 显示的数字钟，能显示年月日时分秒，以及星期还有闹铃时间，时间闹铃等可以自动调节，还有电台报时功能。星期模块有些许问题，调年月日的时候星期不会自动跳变，需要自己重新调，正常计时会自动跳变。-Spartan 3 e- 500 LCD display digital clock, can show minutes when (date) (month) (year), and week as well as the alarm time, time can aut
bresenham-algorithm
- Bresenham algorithm code, on verilog language using a Spartan 3
lab5cron
- this code is a chronometer for fpga spartan 3