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UARTofVHDL
- 基于vhdl的uart程序设计：完全按照论文格式编写。-The uart vhdl-based Programming: paper format exactly as written。
uart
- 模拟串口程序，VHDL语言编写，带modem。-vhdl
uart
- Uart lite vhdl descr iption with properties to evaluate performances in data transmission and reception.
sci_module
- verilog编写的串口模块，可以直接使用，已经成功用于产品上了。-UART by verilog.
uart
- vhdl code that s used to programming uart
UART_communication
- it s a document where described rs232 communinication between pc and fpga . it describe the vhdl structure of uart driver in fpga that allow communication between this devices
UART
- VHDL编写的FPGA串口与电脑通信-Written in VHDL FPGA serial communication with the computer ..
uart-con
- This is a vhdl file for implementing UART.
TLC5510-VHDL
- （1）UART发送器VHDL程序 --文件名：transfer.vhd。 --功能：UART发送器。 --说明：系统由五个状态（x_idle,x_start,x_wait,x_shift,x_stop）和一个进程构成。 -(1) UART transmitter VHDL program- the file name: transfer.vhd.- Function: UART transmitter.- Descr iption: The system consists of
UART
- 用VHDL语言编程实现UART，8位数据位，校验位自己可以加！LIBERO仿真正确！-VHDL language programming with UART, 8 data bits, parity bit that they can add! LIBERO simulation correctly!
uart
- 串行异步收发接口，简称UART，是一种广泛应用的串行传输接口。这是用vhdl实现的程序，将UART分成相应的几个模块，并用顶层文件进行模块化设计。-Send and receive asynchronous serial interface, referred to as the UART, is a widely used serial transmission interface. This is achieved using vhdl procedure to the appropriat
uart
- This iss VHDL source code for uart. I build and test it for SPARTAN-3E1600 and it work properly
UART2
- 基于SPARTAN-3E的与计算机的异步串行通信，可根据需要更改波特率等等。-SPARTAN-3E based on the asynchronous serial communication with the computer, according to the need to change the baud rate and so on.
a_vhd_16550_uart
- 兼容16550 uart，使用fpga实现，支持多平台-Compatible with 16550 uart, use fpga implementation, multi-platform support
uart_transceiver
- 一个通用串口通信FPGA程序。大家可以借鉴-a uart FPGA pragram.you can modify and use it in your project.
A-Simplified-VHDL-UART
- In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this
uart1
- vhdl uart module. this file is used to transfer programs frm fpga xilinx spartam 3e kit to desktop pc through rs232 serial port.
uart
- QUARTUSII 环境 内容为整个工程 ，可以直接用 VHDL 实现UART通讯-QUARTUSII environmental elements for the entire project, you can directly communicate with the VHDL implementation of UART
vhdl
- 基于PicoBlaze的实时时钟设计。PicoBlaze是Xilinx的8位软核。采用汇编语言编写。-Uart real timer
uart
- 基于VHDL语言的fpga uart 口通讯的源程序，经验证可用，开发环境Quartus -VHDL UART QUARTUS II