搜索资源列表
kb_lcd
- 由VHDL撰写的PS/2键盘输入至LCD的程序，可以由DE2 Board直接进行烧录测试。-VHDL written by the PS/2 keyboard input to the LCD s program, you can burn directly from the DE2 Board test.
a12
- FPGA读写SDRAM的VHDL程序(已经测试过)-FPGA SDRAM read and write the VHDL program (already tested)
Para_to_Seril
- 用VHDL实现串并变换的程序，FPGA测试成功，正确变换。-String with VHDL implementation and transformation procedures, FPGA test successfully, the correct transformation.
Frequency_measurement_precision
- 用FPGA实现等精度测频，比一般测量频率准确，这是控制FPGA的VHDL程序，测试过是好的，可以直接下载使用。-Frequency measurement precision
VGA2
- 基于FPGA的VGA显示程序 测试过的，是VHDL源码-FPGA-based VGA display program tested, is VHDL source
adder_vhdl
- 经典的加法器程序，用VHDL写的，包括测试向量-Classical adder program, written using VHDL, including test vectors
FIFO82
- 一个测试FIFO16的VHDL程序，关于FPGA的，大家有用的分享啊-A test FIFO16 the VHDL program, on the FPGA, and it would be useful to share ah
MyUART
- 经过我严格测试，已经获得实际应用的RS232串口通讯的VHDL编写的程序，对于初学者绝对有帮助！-After I tested, has received the application of the RS232 serial communication program written in VHDL, for absolute beginners help!
LCD12864_TEST
- VHDL语言，１２８６４显示屏的驱动程序，本人已在自己开发板上测试成功，需要的朋友下载后根据自己的开发板稍加修改即可-VHDL, 12864 display driver, I have tested successfully in my own test board, you need slightly modified according to your own test board
Marquee
- VHDL语言设计的跑马灯程序，使用8段数码管，并能递减计时，计时时间到蜂鸣器响声输出，数据在数码管上滚动显示，在试验箱上测试通过。-Marquee VHDL language design process, with 8 of the digital control, and can decrease time, time time to sound the buzzer output, data on the digital scroll in the chamber on the test.
UART
- 串口VHDL程序，Xilinxṩ 测试成功。-Serial VHDL program, Xilinxṩ test was successful.
spi
- 描述了总线的vhdl程序，并且有测试语句的描写 仿真之后可以实现-Describes the bus vhdl program, and a test statement, after describing the simulation can be achieved
sdfa
- LCD控制VHDL程序与仿真, 各位可以试一试,我已完成仿真和测试-LCD control procedures and VHDL simulation, you can try
UART_MODULE
- 本程序是一个简单的232串口程序，采用VHDL语言编写，并已在3S500E上测试通过-This program is a simple 232 procedures, the use of VHDL language, and has been tested on the 3S500E
test1602
- 1602的VHDL程序！在自己的板子上一测试测试成功！-1602 VHDL program! In their board a test success!
sram_vhdl
- 基于vhdl的sram读写访问程序，经过前后仿真及板上实际测试-failed to translate
UART
- 异步串口收发程序，波特率4800。VHDL写成。在ALTERA开发板上测试成功。-This is a UART program, with a fixed 4800bps. Tested successfully on an Altera divice.
Trigger
- 各类触发器VHDL源码程序，在quartus-ii7.2版本上测试通过，文件中包括D触发器，JK触发器，RS触发器，T触发器。-Various triggers VHDL source code program in quartus-ii7.2 version of the test is passed, the document includes a D flip-flop, JK flip-flop, RS flip-flop, T flip-flop.
spi_master
- 用VHDL编写的一个SPI主机程序，SPI模块采用最常用的模式0方式（即CPOL=0,CPHA=0）通信。文件内含测试文档，已在Modelsim6.5上测试通过，可在FPGA上直接调用。-A SPI Master code edited by VHDL language,the SPI modul use 0 MODE(i.e CPOL=0,CPHA=0)to communicate with the SPI Slave.and there is a testbench in the file
fpga_uarst
- fpga USART通信，VHDL语言编写，通过测试。程序全面运用了状态机编程-The fpga the USARTs communications, VHDL language, pass the test. The entire process of the use of state machine programming