搜索资源列表
R232_total
- 用VHDL语言在FPGA上实现RS232的通信-RS232 communication is implemented on FPGA using VHDL language
shixusuccessful
- 利用VHDL语言，对时分复用通信系统的仿真实现，包括序列产生到序列接收等部分。-Simulation time division multiplexing communication system
PS2-keyboard-interface-display
- 1、学习用FPGA设计简单通信协议的方法。 2、学习PS2的工作原理，扫描码的ASCII码的转换。 3、掌握VHDL编写中的一些小技巧。 -One, learning to use a simple communication protocol FPGA design methods. 2, learning PS2 works, scan code ASCII conversion. 3, master VHDL prepared some of the tips.
hsk4571_cuankou
- 串口通信SCI VHDL实现，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T1-Serial communication SCI VHDL realize, in QUATTUS | | 9.0 under preparation, can be run in the 9.0 and above versions and download, chips for Altera' s Cyclone3 EP3C8T144
uart
- VHDL编写的UART异步串行通信接口程序，，，经过仿真验证，简单易懂-VHDL prepared UART asynchronous serial communication interface program, through simulation, simple,,,,,
MYPCI
- PCI VHDL程序，根据PCI通信协议编写的，，，没有用IP核，。。。本人接触PCI不久，次代码可能会存在些问题，请各位高手指点指点，小弟不尽感激-PCI VHDL procedures, according to the PCI communication protocols written, without using IP cores. . . I contact PCI soon, there may be some minor code issues, please master g
FPGA_UART
- FPGA实现UART串口通信协议 采用VHDL语言，顶层文件采用原理图的方式，简洁直观-FPGA Implementation of UART serial communication protocol
CPLD2AT89C51
- 实现了单片机AT89C51与CPLD之间的双向通信含有可编程逻辑器件发送数据到单片机的VHDL源程序和CPLD接收VHDL源程序-AT89C51 microcontroller and CPLD achieve a two-way communication between the programmable logic device containing a microcontroller to send data to the receiver VHDL source code and CPL
vhdlRs232
- 通过 vhdl 语言实现rs232 通信-Communication via rs232 vhdl language
VHDLRS232Slave
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 //制器，10个bit是1位起始位，8个数据位，1个结束 //位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实 //现相应的波特率。程序当前设定的div_par 的值是0x145，对应的波特率是 //9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间 //划分为8个时隙以
MCU_to_FPGA
- FPGA与单片机通信的代码，采用VHDL编写，已验证过-FPGA and MCU communication code, the preparation of VHDL has been verified
FPGA_to_430
- 这是基于FPGA和msp430的通信驱动程序，FPGA用VHDL编写，MSP430用C语言编写。-This is based on FPGA and the msp430 communication driver, FPGA using VHDL, MSP430 using the C language.
cpld_uart_TXRX
- max2 cpld 开发的vhdl 完整串口通信程序，TXRX可同时收两个命令 带超时 600门-max2 cpld vhdl developed complete serial communication program, TXRX can simultaneously receive two commands with timeout 600
fredivn
- UART的异步串口通信协议的VHDL语言实现 异步接收/发送模块-UART asynchronous serial communication protocol of the VHDL language to achieve asynchronous receiver/transmitter module
CRC
- 利用VHDL语言,用FPGA设计一个数据通信中常用的数据检错模块—循环冗余校验CRC模块,选用当前应用最广泛的EDA软件QUARTUS II作为开发平台-Using VHDL, FPGA design of a common data in data communication error detection module- Cyclic Redundancy Check (CRC) module, currently the most widely used EDA software QUAR
IIC-bus-communication
- IIC通信的VHDL实现，含有IIC的通信标准，能正常使用-IIC communication bus program
rs232_tr
- 自学的串口通信模块，包含接收模块，发送模块，波特率模块，顶层模块-RS232 communication application,VHDL code
UART
- 用VHDL语言写的串口通信程序，注释详细，简单易懂，便于学习-VHDL language used to write the serial communication program, detailed notes, easy to understand, easy to learn
dataroad
- VHDL数据通路实验，内容包括：总线通信的基本原则；设备寻址的过程；掌握总线分时复用的方法；掌握多个部件数据通信时数据通路建立过程与控制信号和时序信号的关系。 -VHDL datapath experiments, including: basic principles bus communication Device Addressing process master bus time-multiplexing method grasp the multiple components
FPGA-UART
- 基于ＶＨＤＬ的语言编写的串口通信。是使用的EP2C8Q208芯片。-Based on the VHDL language serial communications. Is EP2C8Q208 chips used.