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FPGA_signal_general
- 摘 要:介绍了直接数字频率合成 (DDS) 技术的基本原理,给出了基于Altera公司FPGA器件的一个三相正弦信号发生器的设计方案,同时给出了其软件程序和仿真结果。仿真结果表明:该方法生成的三相正弦信号具有对称性好、波形失真小、频率精度高等优点,且输出频率可调。 关键词:直接数字频率合成;现场可编程门阵列;FPGA;三相正弦信号-Abstract: Direct Digital Synthesis (DDS) technology, the basic principles are giv
bxfsq
- 波形发生器的代码,具有产生正弦波、方波、三角波的功能。-Waveform Generator code has generated sine wave, square, triangle-wave function.
FPGADDS
- 基于FPGA的DDS信号发生器的简单实现。DDS(直接数字合成)是近年来迅速发展起来的一种新的频率合成方法。这种方法简单可靠、控制方便,且具有很高的频率分辨率和转换速度,非常适合快速跳频通信的要求。 -FPGA-based signal generator DDS simple to achieve. DDS (direct digital synthesis) is a rapidly in recent years developed a new method of frequency sy
jiyuVHDLyuyandehanshuxinghaofashengqi
- 好用的函数信号发生器,能产生多种波形,例如,正弦波,方波,锯齿波,阶梯波。-Useful function signal generator, can produce a variety of waveforms, for example, sine wave, square wave, sawtooth, wave ladder.
pn_gen_vhd_211
- 通信中常用的PN序列产生器的源代码全部打包-Communications commonly used in PN sequence generator, the source code of all packaged
mig007
- XILINX memory interface generator. XILINX的外部存储器接口。-XILINX memory interface generator.
chengxu
- 关于频率计程序的设计,LCD控制程序,PSK调制解调的控制程序,MSK调制解调控制程序,电梯控制程序,TLC5510控制程序,基带码发生器程序,电子琴程序,自动售货机程序,电子时钟程序,步进电机控制定位系统,波形发生器,出租车计价器,ADCO809-Procedures regarding the design of frequency meter, LCD control procedures, PSK modulation and demodulation of the control pr
top
- RS232串行通信,采用VHDL编程,由波特率发生器,接收器和发送器构成-RS232 serial communication using VHDL programming, by the baud rate generator, receiver and transmitter constitute
UART_SUCCESS
- 实现FPGA和上位机的串口通信,里面由波特率发生器,移位寄存器,计数器,detecter,switch,switch_bus等功能块综合而成。-FPGA implementation and the host computer' s serial communication, which by the baud rate generator, shift register, counters, detecter, switch, switch_bus such as function bl
signal_generator
- 基于vhdl的多功能函数信号发生器的设计,能实现三角波、方波、正弦波。-VHDL-based multi-function signal generator design, can achieve the triangular wave, square wave, sine wave.
sin
- 正弦信号发生器源文件实现正弦信号发生器,非常有用,欢迎下载。-Sinusoidal signal generator source file achieve sinusoidal signal generator, very useful and welcome to download.
rng
- 通信系统中的噪声发生器,可用于CDMA信号源电路。-Communication system noise generator can be used for CDMA signal source circuit.
vhdldds0000
- 采用fpga的hdl语言实现dds的信号发生器的设计,性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
example10
- :正弦波发生器例程,包括了直接数字频率合成(DDS)的原理以及如何应用CPLD产生频率可控频率的正弦信号。-: Sine wave generator routine, including a direct digital synthesizer (DDS), as well as the application of the principle of frequency control CPLD generated sinusoidal signal frequency.
uart_zhiwen
- RS232的UART编程,包括波特率发生器模块,串口接受模块,串口发送模块-RS232 programming the UART, including the baud rate generator module, serial module to receive, send serial module
hamming
- Hamming code generator for 4 bit
svc_timer33ms
- Verilog 下脉冲发生器的源代码,可用于模拟三相交流电过零点,主要用于调试一些类似SVC(无功补偿)控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) co
Sine
- 正弦波发生器,可以让大家学习正弦多种产生方法,可以设计具体电路-Sine wave generator, allowing them to learn the method for multiple sinusoidal, can design a specific circuit
DDS-baseddesignofthesinusoidalsignalgenerator
- 本设计采用AT89552单片机,辅以必要的模拟电路,实现了一个基于直接数字频率合成技术(DDS)的正弦谊号发生器。设计中采用DDS芯片AD9850产生频率1KHZ~10MHZ范围内正弦波,采用功放AD811控制输出电压幅度, 由单片机AT89S52控制调节步进频率1HZ。在此基础上,用模拟乘法器MC1496实现了正弦调制信号频率为1KHZ的模拟相度调制信号;用FPGA芯片产生二进制NRZ码,与AD9850结合实现相移键控PSK、幅移键控ASK、频移镇键FSK。-AT89552 the singl
sheji2
- 一个秒表的硬件设计,学习数字电路中基本RS触发器、单稳态触发器、时钟发生器及计数、译码显示等单元电路的综合应用。-The hardware design of a stopwatch, learn basic digital circuit in the RS flip-flops, monostable multivibrator, the clock generator and counting, decoding display unit integrated circuit applic