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intelligent-function-generetor
- 本设计采用综合设计方法使用FPGA来实现智能函数发生器,它由六个波形产生模块及波形选择输出模块组成,波形选择模块的输出q接在D/A转换的数据端,就可以在D/A输出端得到想要的其中之一的任一种光滑的波形。-VHDL \FPGA \EDA
exp1.8_Dflipflop
- 用VHDL及verylog语言设计一个D触发器,可以在Quartus II中仿真-Language Design with VHDL and verylog a D flip-flop, the Quartus II simulation in
DAC0832-interface-control
- 基于VHDL语言,实现对高速A/D器件DAC0832控制-Based on VHDL language, to achieve high-speed A/D control devices DAC0832
parallel_in_serial_out
- 适用于D/Atlc5620的并行-串行数据转换模块【VHDL】-parallel_in_serial_out driver for D/Atlc5620【VHDL】
Trigger
- 各类触发器VHDL源码程序,在quartus-ii7.2版本上测试通过,文件中包括D触发器,JK触发器,RS触发器,T触发器。-Various triggers VHDL source code program in quartus-ii7.2 version of the test is passed, the document includes a D flip-flop, JK flip-flop, RS flip-flop, T flip-flop.
vhdl_codes
- D-flip flop vhdl implement code
Desktop
- 四D触发器,最优先级编码器和加法器描述的VHDl文件-Four D flip-flop, the priority encoder and adder descr iption of the VHDl files
async_reset_dff
- 异步复位的D触发器 vhdl fpga xilinx spartan-3e-D flip flop async-reset vhdl fpga xilinx spartan-3e
report
- 利用VHDL语言实现基于pwm的D/A转换,要求,可以通过按键来分别选择占空比,从分别选择20,40,60,80。-Using VHDL language the pwm D/A conversion can be keys to select the duty cycle, from the Select 20, 40, 60, 80.
chuzuche
- 一款基于VHDL的EDA计程车计费系统的设计.熟悉Quartus2操作环境-LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL ENTITY liuxuanyi IS PORT(C:IN STD_LOGIC_VECTOR(2 DOWNTO 0) DP: OUT STD_LOGIC A1,A2,A3,B1,B2,B3:IN STD_LOGI
AD
- 有限状态机的设计——0809 A/D转换实验-VHDL for ADC0809
fli
- --- vhdl code of d flip flop ---- vhdl code of d flip flop ---
Acquisitio-Monitoring-of-CPLD
- 基于CPLD的数据采集与监控系统设计.CPLD; 数据采集及监控; VHDL; A/D转换。-The design based on Data Acquisition and Monitoring System of CPLD
dff1
- 本程序使用vhdl语言编写,能够使用ALTERA CPLD-EPM3128A 模拟出一个D触发器。-This program written in vhdl language, be able to use of ALTERA the CPLD analog-EPM3128A, a D flip-flop.
div16_dff
- 该项目用D触发器设计了一个基于VHDL的16分频的分频器,其中包括仿真时序图。-Of the project design with D flip-flop frequency divider 16 points based on VHDL, including simulation timing diagram.
vhdl1
- mesure de la largeur d une impulsion en vhdl
Embedded-Systems_VHDL
- Digital Design An Embedded Systems Approach Using VHDL Peter J Ashenden The source code for the examples is available in the following ZIP archives, one per chapter. There is also an archive containing source code for the Gumnut core, descri
fsk_completed
- FPGA为设计载体,VHDL 为设计输入,完成2FSK调制器的实现,下载到DE2平台通过D/A转换模块于示波器上实现-2FSK based on Fpga
8.5-TLC5510
- TLC5510 VHDL控制程序:基于VHDL语言,实现对高速A/D器件TLC5510控制-The TLC5510 VHDL control procedures: TLC5510 control of high-speed A/D devices based on VHDL
Dff
- D 触发器,数字电路中最基本的逻辑单元之一。很实用的程序例子-D flip-flop, one of the basic logics in the digital design, an instance of a Sequential VHDL codes