搜索资源列表
dds
- 在altera的FPGA上实现直接数字频率合成，即用verilog实现DDS，输出正弦波形，在modelsim软件中仿真通过，已包含所有代码和工程以及二进制流文件。-The realization of direct digital frequency synthesis in the Altera FPGA, which is implemented by Verilog DDS, the output sine wave, through the simulation in Modelsim
ds18b20
- 在altera的FPGA上使用ds18b20温度传感器制作数字温度计，并用数码管显示。使用的语言为verilog，包含全部工程与文件，可以直接使用。-Making use of DS18B20 digital thermometer temperature sensor in the Altera FPGA, and digital tube display. The language used for the Verilog, including all the projects and fi
PWM_music
- 在altera的FPGA平台上，使用verilog语言实现蜂鸣器的音乐，内含乐谱理论和verilog实现的FPGA奏乐代码与工程，已经测试通过，可以直接下载到FPGA运行，蜂鸣器播放音乐。-In the Altera FPGA platform, using Verilog language to achieve the buzzer music, FPGA music code and engineering including music theory and implementation
key-led
- 按键控制LED的工程，使用Verilog编写 程序完整 对初学者来说是个不错的借鉴-LED button control engineering, using Verilog programming complete beginners is a good reference
3_8-code-translator
- verilog入门系列完整工程文件：3-8 译码器。-3_8 code translator
antenna_position
- 本程序为船舶导航雷达天线方位部分的verilog程序，包含QPF工程。-This procedure for the marine navigation radar antenna part of the Verilog program, including QPF works.
T01_UART_CORE
- Verilog 实现的 UART串口读写控制核 参数化校验、时钟设置，完整工程（xilinx），包括文档、源码等。供学习参考，希望大家上传自己代码，共同提高，打倒小日本。-Verilog implementation of the UART serial port to read and write control nuclear parametric check, clock setting, complete project (Xilinx), including documentation
vga_color_slip
- 使用Verilog完成VGA的驱动和显示，完整的工程，可直接使用-Using Verilog complete drive and VGA display, complete engineering, can be used directly
ds1302_seg7
- 使用Verilog完成DS1302的驱动，工程已经经过测试，可直接使用。-DS1302 using Verilog complete drive, the project has been tested and can be used directly.
ltc5615_pot
- 使用Verilog完成ILC5615的驱动，已经经过测试，可直接使用工程。-Using Verilog complete ILC5615 drivers have been tested can be used directly works.
iic_wr
- 使用Verilog完成对I2C总线的读写操作，已经经过测试，工程可直接使用。-Using Verilog complete I2C bus read and write operations, has been tested and works can be used directly.
lab7_2_new
- 移动信息工程学院实验课程源码：用FSM实现soda_machine(自动售货机)-Use verilog to implemwnt a soda_machine
lab9_1_1
- 用verilog模拟一个十字路口的红绿灯。移动信息工程学院实验题-To implement a traffic light in verilog.The experiment of SMIE
sram_test_OK
- 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动，SRAM型号为IS61LV25616，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图-Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for
fsmc_ad9215
- 主要是基于FPGA(EP2C8Q208I8)下的高速AD9215驱动，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图-Mainly based on the high-speed AD9215 FPGA (EP2C8Q208I8) under the driver, the programming language for Verilog, a development environment for quartusII 7.0, for
I2C
- Verilog语言实现I2C通信功能，可直接作为模块用于自己工程中。-Verilog language I2C communication functions can be used directly as a module for their own projects.
Posedge-Detection-Circuit
- Verilog脉冲边沿检查，此代码包含完整的工程，利用quartus软件可以直接运行仿真。-Verilog edge of pulse examination, this code contains the complete engineering, quartus software can be used to directly run the simulation.
div_3
- 用Verilog实现时钟三分频，该代码包含完整的工程文件，可直接运行。-The realization of clock frequency of three Verilog, the code contains the complete engineering documents, can be directly run.
FIR
- 基于Verilog的FIR滤波器的设计，该代码包含完整的工程，可以利用quartus软件直接运行-Design of FIR filter based on Verilog, the code contains a complete project, can use quartus software to run directly
uart_top
- FPGA verilog hdl UART232 工程及相关源程序，可直接使用-FPGA verilog hdl UART232 project and source code use it directly