搜索资源列表
ANIOStestrepob
- 有关NIOS ii 各种学习试验报告，通过这个nios配置试验，可以大概了了解nios的整个配置过程，熟悉 NIOS的CPU结构和Avalon总线规范。 -A variety of learning about the NIOS ii test report, test configuration through the nios can probably understand nios the entire configuration process, familiar with the
ug_avalon_tc
- altera公司avalon总线使用说明，希望对大家有帮助，欢迎使用，-altera company avalon bus instructions for use, we hope to welcome to use, thank you
pwm
- 一个用AVALON总线控制的PWM模块，可以结合SOPC中的定制模块来使用，经过测试使用正确-With the AVALON bus control of a PWM module can be combined with SOPC custom module has been tested using the correct
Avalon
- 这是一种总线，学习ＮＩＯＳ＿ＳＯＰＣ的时候会应用到。-This is a bus, Learning NIOS_SOPC when applied to.
Nios-II-I2C
- 使用开源的IIC MASTER Core，将它加载到NIOSII的AVALON总线上，这样对于NIOSII控制器而言，IIC MASTER就是一个硬件实现的控制器，用户通过调用API函数就能很容易的对IIC进行操作，而且IIC的运行并不占用NIOSII软核宝贵的资源和时间。 -Open source IIC MASTER Core,it is loaded into the AVALON bus NIOSII This NIOSII controller,IIC MASTER is a hard
PWM_IP_TEST
- 自定义PWM的IP核 符合avalon总线格式-Custom PWM IP core is in line with the avalon bus format
LBC_Avalon2.0_SOPC
- 基于SOPC Builder, EP3C40系列FPGA的Avalon总线和MPC8349处理器本地总线LBC，采用Verilog编写的Avalon总线与LBC的转换接口。-Based on SOPC Builder, EP3C40 FPGA family Avalon bus and MPC8349 Processor Local Bus LBC, using Verilog prepared with LBC conversion Avalon bus interface.
seg7
- fpga上nios处理器avalon总线数码管驱动，包含任务逻辑，寄存器，和接口的verilog HDL描述-fpga nios processor avalon bus on digital tube driver, including the task logic, registers, and interfaces verilog HDL descr iption
lcd12864_avalon_interface
- 实现avalon总线的12864接口，可以进行总线操作。-io port
Hd7279
- nios键盘数码管驱动芯片HD7279驱动程序，使用avalon总线方式编写-Nios keyboard LED Driver IC HD7279 driver, use the avalon bus approach to the preparation of
Q11_SOPC_Freq_Avalon
- FPGA平台下基于Nios II的数字频率计，测频模块采用verilogHDL编写，等精度算法，Avalon总线封装，Nios II读取最终的频率数值，显示在LCD12864上。-The Nios digital frequency meter based on II FPGA platform, the frequency measurement module written by verilogHDL, such as the accuracy of algorithm, Avalon bu
PWM
- 基于Avalon总线的PWM的实现，verlog语言编程-PWM-based Avalon bus implementations, verlog language programming
wishbone_to_avalon
- wishbone-slave-and-master-to-avalon-bus,是关于wishbone总线和Avalon总线的转换，有实用价值，采用的是verilog编写
自定义PWM IP核，符合avalon总线
- 适合初学qsys、nios者，含tb文件，仿真通过，无bug
pwm
- 自定义pwm ip核，符合AVALON总线-Custom PWM IP core, in line with the avalon bus
SEG7_IF
- SEG7_IP.v是七段数码管的驱动程序，符合avalon总线协议，可以直接添加七段数码管的ip核使用。-SEG7_IP.v is the seven segment digital tube driver, in line with the Avalon bus protocol, you can directly add the seven segment digital tube IP nuclear use.
ReadFifo
- QuartusII 15.0版本中，在Qsys中建立的自己定制的符合Avalon总线协议的IP核，实现功能将输入的TS流识别并存储到FIFO中，Nios核再通过总线对数据进行读取-QuartusII 15 version of the Qsys in to establish their own custom Avalon bus protocol in line with the IP core, the realization of the function to enter the TS
ad7688_nios
- AD7688 ADC的SOPC系统，包含AD7688 Avalon总线接口IP，SOPC系统，NIOS软件-AD7688 ADC in SOPC system, include AD7688 avalon interface IP, sample SOPC system, NIOS software
ad7298_nios
- AD7298 ADC的SOPC系统，包含AD7298 Avalon总线接口IP，SOPC系统，NIOS软件-AD7298 in SOPC system, include AD7298 avalon interface IP, sample SOPC system, NIOS software
altera_avalon_pwm
- 基于nios2的PWM模块设计，兼容avalon总线结构(PWM module design based on nios2, compatible with Avalon bus structure)