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codeofvhdl2006
- 【经典设计】VHDL源代码下载～～ 其中经典的设计有：【自动售货机】、【电子钟】、【红绿灯交通信号系统】、【步进电机定位控制系统】、【直流电机速度控制系统】、【计算器】、【点阵列LED显示控制系统】 基本数字逻辑设计有：【锁存器】、【多路选择器】、【三态门】、【双向输入|输出端口】、【内部（缓冲）信号】、【编码转换】、【加法器】、【编码器/译码器】、【4位乘法器】、【只读存储器】、【RSFF触发器】、【DFF触发器】、【JKFF触发器】、【计数器】、【分频器】、【寄存器】、【状态机】
jishuqi.rar
- 描述的是一个带有异步复位和同步时钟使能的十进制加法计算器,,With reset and clock enable decimal calculator
MultipleNumbersCalculator
- Multiple Numbers Calculator (source code and LAB notes)
verilog
- 组成原理的大作业，写一个计算器，用verilog语言写的-The composition of the major principles of operation, write a calculator, using the language written in Verilog
cordic
- cordic methods describe essentially the same algorithm that with suitably chosen inputs can be used to calculate a whole range of scientific functions including sin, cos, tan, arctan, arcsin, arccos, sinh, cosh, tanh, arctanh, log, exp, square root a
calculadora.v.tar
- basic special calculator for begginer students of electrical engineerings
dp1sol
- Simple Binary Calculator
calculator
- 此源码为在xilinx环境中用VHDL实现计算器，实例可用xcs40xl-4-pq208戓xc2s100-6pq208FPGA来实现-The source code in xilinx environment using VHDL implementation calculators, examples can be xcs40xl-4-pq208 Ge xc2s100-6pq208FPGA to achieve
VHDL
- 计算器实现 功能简单容易实现 可自我调试至更强大性能，不喜勿下-Calculator features simple and easy to achieve self-commissioning to a more powerful performance, do not like not under
verilog_calculator
- 用verilog编写的简易计算器代码。通过一位全加器组成电路，可以实现加法、减法和乘法，并在七段数码管上显示出十进制的结果。-Simple calculator with code written in verilog. Composed by a full adder circuit, can add, subtract and multiply, and in the seven-segment LED display on the decimal result.
VHDL
- It s a simple calculator of addition and multiplication using a simple stack, with multiple test benches. The files test-button and debounce are for the use on a board for the correct functionality of the input buttons.
Simple-calculator
- Simple calculator using VHDL coding
calculator
- 利用verilog和vhdl两种语言写作的计数器，还有个性化设计模块，利用quartusii平台写作。-Use verilog and vhdl counter writing in two languages, as well as personalized design module, using the platform quartusii writing.
Calculator
- VHDL计算器，涉及PS2输入，VGA视频输出，加法器，BCD转化。可以通过研究代码学习以上知识-VHDL calculator, involving PS2 input, VGA video output, the adder, BCD transformation. You can learn more knowledge through research code
calculator
- 基于vhdl设计的具有加减乘除以及取余数等等运算功能的计算器，可通过键盘扫描实现输入。-Vhdl-based design has addition, subtraction, and take the remainder and so on arithmetic function calculator, can be achieved through keyboard input scanning.
vhdl---calculator
- 基于vhdl语言编写的简易计算器程序，其中主要功能有加减乘和清除，确定等，可实习现连续运算。输出使用七段数码管输出，输入采用拨码开关的方式输入。若计算结果超过99999，蜂鸣器自动报警。-Vhdl language based on simple calculator program, where the main function, subtraction, multiplication and clear, determined, can now practice continuous op
calculator-project-VHDL-FPGA
- Calculator PROJECT FPGA ALTERA DE-2
calculator
- simple VHDL calculator
VHDL-Samples
- VHDL Samples，8-bit calculator controller；vending machine controller with typical vending machine logic ；mplements (most of) the logic required to implement a IEEE 754 multiplier unit.
vhdl-codes
- Vhdl calculator de buzunar proiect