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UART-VHDL-design-
- 设计的VHDL串口实例,感觉还不错,可以拿来借鉴和修改啊!-Design VHDL serial instance, I feel pretty good, can be used to draw and modify ah!
can
- 一个典型的CAN总线的VHDL程序,非常有参考价值-A typical CAN bus VHDL program, a very valuable reference! !
VHDL-program
- VHDL实验程序。需要的可以在此基础上修改。-Program VHDL experiment. Need can be modified on this basis.
VHDL Code for The Flying-Adder Synthesizer
- VHDL Code for The Flying-Adder Synthesizer, The Flying-Adder is an all-digital structure frequency synthesizer. Some pictures enclosed can help you understand the structure and the code. Reverence: Nanometer Frequency Synthesis Beyond the Phase-locke
VHDL
- 74LS161 JK触发器带清0端,项目名称为dff_JK_111 十进制计数器74LS290,项目名定为CTLS290:运算方法编写的290计数器:另一种编法LS290 不带使能端的3线8线译码器 八选一数具选择器:用CASE语句 全加器: 简单的JK触发器-74LS161 JK flip-flop with cleared end Project Name dff_JK_111 decade counter 74LS290 project name as CTLS290: and comp
simple-microwave-by-VHDL
- 用VHDL实现一个建议微波炉设计 1. 微波炉的火力有大、中、小三档可选。用一个按键实现火力的选择,用点阵显示火力档位,点阵的显示随着按键的按下次数而变化,没有选择时默认的火力为大; 2. 微波加热时间在0-59分59秒之间可选。用4个按键分别设置加热时间各位的长度,用数码管显示加热时间; 3. 设置一个开始键,按下此键后开始加热。加热过程中,用数码管倒计时显示剩余时间; 4. 加热过程中,不能修改火力和加热时间; 5. 加热完成后蜂鸣器至少鸣响两声以提醒使用者加热已结
vhdl-tutorial
- The purpose of this tutorial is to describe the modeling language VHDL. VHDL includes facilities for describing logical structure and function of digital systems at a number of levels of abstraction, from system level down to the gate level. It i
deserialize-VHDL
- VHDL写的串并转换代码,经ISE13.3测试能用的。-VHDL to write a serial-to-parallel conversion code, can be used the ISE13.3 test.
VHDL-and-Verilog-code
- 82个逻辑器件的VHDL和Verilog源码实例,可直接使用。-VHDL and Verilog source code examples of the 82 logic devices can be used directly.
1602led-drive-VHDL
- 使用VHDL编写1602led驱动程序,整个项目文件,可直接使用。-Use VHDL to write 1602led driver, the entire project file, and can be used directly.
digital_piano-VHDL
- 使用VHDL编写数字蜂鸣器音乐,整个项目文件,可直接使用 -Use VHDL to write 1602led driver, the entire project file, and can be used directly.
led-12864-VHDL
- 使用VHDL编写led12864,整个项目文件,可直接使用 -Prepared to use VHDL led12864, the entire project file, and can be used directly
VHDL-Model
- VHDL设计中一些常用模块,可以用于搭建更复杂的系统-some commonly used modules for VHDL which can be used to build more complex systems
VHDL
- 与神经网络有关的硬件描述语言实现与参考,用VHDL编写,可给大家参考一下-And neural network-related hardware descr iption language and reference, using VHDL can be your reference
Vhdl-Implementation-of--Fast-32x32-Multiplier-Bas
- The Vedic mathematics is quite different from conventional method of multiplication like adder and shifter. This mathematics is mainly based on sixteen principles. The multiplier (referred henceforth as Vedic multiplier) architecture base
VHDL
- VHDL语言中的符号扩展方法,方法简单可靠,可以用来快速编写 vhdl程序,希望对大家有帮助。-VHDL language sign extension method, the method is simple and reliable, can be used to quickly write vhdl program, we hope to help.
stopwatch-VHDL
- 自己用VHDL语言写的一个秒表程序,包括秒,分秒和百分秒。有程序说明和VHDL代码,一看就懂-Own use VHDL language used to write a stopwatch program, including the seconds, minutes and seconds and hundredths of a second. There descr iption of the procedures and VHDL code, one can understand
8085-vhdl-code
- 8085 VHDL code that you can use on FPGA
VHDL-based-music-player-design
- 为本人2012年下学期的EDA大作业,含 设计文档 和 源代码。所设计的系统在网上很难找到(当时我就没找到,特别是源码),二本系统又具有一定的实用性,只要在ROM中存储不同的歌曲编码,即可播放不同的乐曲。 文章详细介绍了“具有自动乐曲演奏功能的电子琴”的FPGA设计原理与方法,使用了ROM存储音符和节拍,矩阵键盘控制整个系统。 源码注释清楚,容易理解。 欢迎访问我的博客:http://blog.csdn.net/enjoyyl-For the I semester of 20
VHDL-based-digital-clock-programming
- 基于VHDL的数字时钟设计,可以调时间,并且可以设置四个闹钟时间,中和很多VHDL的基本程序,对初学者很有用-VHDL-based digital clock design, you can adjust the time, and you can set four alarm time, and in a lot of VHDL basic procedures, useful for beginners