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程序主要用硬件描述语言（VHDL）实现：
单片机与FPGA接口通信的问题-procedures major hardware descr iption language (VHDL) to achieve : MCU and FPGA interface communication problems
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vhdl 很好用于串行通信.
三个模快,发生时钟,发送和
接收过程-VHDL good for serial communication. Three die fast, occurred clock, sending and receiving process
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这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware descr iption language of the IP core can be directly translated Operation
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数字通信系统通信系统调制解调（PL_FSK）VHDL建模，包括发送和接受模块-Digital Communication System Communication System modulation and demodulation (PL_FSK) VHDL modeling, including sending and receiving modules
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基于logmap算法的vhdl的实现。
通信系统的log—map算法数字vhdl的实现-logmap algorithm based on the achievement of VHDL. The communication system log-map algorithm to achieve the number of VHDL
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本程序是用VHDL语言实现异步通信控制器，
hao1.vhd为主程序，hao1.scf为仿真波形-this procedure is used VHDL asynchronous communication controller, mainly hao1.vhd procedures, hao1.scf for simulation waveforms
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完整的串行通信电路vhdl代码，已经通过quartus4.0编译-complete serial communication circuit VHDL code, the compiler has passed quartus4.0
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FPGA进行串口通信的程序
VHDL编写的
-FPGA for serial communication procedure prepared by the VHDL
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基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。
在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new
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基于CAN通信的介绍，ISO11898标准的介绍，对于学习CAN通信很有帮助(Based on the introduction of CAN communication, ISO11898 standard introduction, for learning CAN communication helpful)
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-- Descr iption :
-- The controller simplifies the communication with FT245R chip. While
-- provided interface is very similar to that of the chip itself,
-- this controller takes care of all the delays and other aspects of
-- FT245R's protoco
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Spectral methods of computational fluid dynamics flow of some of the overall stability of the phenomenon, Ensure accurate communication is learning a good helper, Course designed to prepare the matlab program code.
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用fpga实现异步串行通信。通过串口助手接收与发送(Implementation of serial communication with FPGA)
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communication rs232 in vhdl with clock divider, counter, buffer, rs232tx, rs232rx.
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spi-slave通信的vhdl实现及其仿真(VHDL implementation of spi-slave communication)
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UART设计的VERILOG代码，具有FIFO功能，能实现CPU与外设之间的数据与指令通信(The VERILOG code designed by UART, which has the function of FIFO, can realize the communication between the data and the instruction between the CPU and the peripherals)
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本系统是基于CPLD和单片机的一种用于信号频率周期、时间间隔和占空比测量的数字频率计，系统由AGC（自动增益控制）电路、宽带放大电路、高速比较电路实现有效值10mV/频率100MHz和处理显示部分组成，其中AGC电路实现幅度自动增益控制使放大后的信号幅度在一定的范围内保持一致，比较电路将前级电路输出的信号转换成CPLD,利用等精度测频原理，实现闸门时间1S的高精度测量。单片机通信处理数据并显示，数据表明，系统精度达到发挥部分要求。(This system is a CPLD microcontr
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基于xilinx的Artix7实现UART通信(UART communication based on Xilinx Artix7)
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基于Xilinx的Artix7实现千兆以太网的RGMII接口通信(RGMII interface communication for Gigabit Ethernet based on Xilinx Artix7)
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RS232通信程序，用于实现PC端与FPGA之间实现串口通信(RS232 communication program for realizing serial port communication between PC and FPGA)
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