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基于vhdl编写的FPGA与PC串行通信的接收信号解码程序，调试已通过。-Vhdl prepared based on FPGA and PC serial communication received signal decoding process, debugging has been passed.
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基于VHDL的FPGA串口通讯程序，能够实现FPGA串口通信-VHDL for FPGA-based serial communication programs that enable FPGA serial communication
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用于测试ADI的TS201与FPGA之间通信的LINK程序，压缩文件内包括VHDL和Verlog代码。-ADI is used to test the communication between the TS201 and the FPGA' s LINK program, compressed file to include VHDL and Verlog code.
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光纤通信中的SDH数据帧解析及提取的VHDL实现源代码，共包含帧同步、E1及F1码流提取、DCC1码流提取、帧头开销串行输出四个主要模块-SDH fiber-optic communication data frame analysis and retrieval implementation of VHDL source code, include the frame synchronization, E1 and F1 stream extraction, DCC1 stream extra
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HART协议的均衡器设计 DCT LMS 设计 + 位同步设计，仿真证明了设计的有效性-HART protocol design DCT LMS equalizer design+ Bit synchronous design, simulation proves the validity of the design
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VHDL语言实现的穿行通讯，可实现闭环操作，通讯过程中每个bit位采样3次，保证数据准确。-VHDL language achieved through communication, can realize the closed-loop operation, communication process each bit digital sampling 3 times to ensure accurate data.
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cpld与pc机通信的VHDL代码，用于模拟cs232收发功能-CPLD with VHDL communication pc machine code, used to simulate the transceiver function cs232
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用vhdl实现的串口通信程序,可以综合并下载到FPGA运行.-Achieved using VHDL serial communication procedures, can be synthesized and downloaded to the FPGA to run.
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基于VHDL的异步串行通信电路设计 随着电子技术的发展，现场可编程门阵列FPGA和复杂可编程逻辑器件CPLD的出现，使得电子系统的设计者利用与器件相应的电子CAD软件，在实验室里就可以设计自己的专用集成电路ASIC器件。这种可编程ASIC不仅使设计的产品-VHDL-based asynchronous serial communication circuit design with the advent of electronic technology, field programmable g
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程控交换机芯片用的VHDL语言程序, 与DSP配合完成程控交换机功能-VHDL code for tele-communication switcher in education
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VHDL通信程序 VHDL通信程序 VHDL通信程序-VHDL communication program
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这是哈尔滨工程大学信息与通信工程学院的VHDL语言及其应用讲义，是初学者学习PFGA好资料。-This is the University of Harbin Engineering Information and Communication Engineering Institute of the VHDL language and its application notes, is good information for beginners PFGA study.
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扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram
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基于VHDL语言的一个新型串行数字通信模块。-Based on the VHDL language, a new serial digital communication module.
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此为在xinlix系统上开发的PS通信程序，用VHDL语言开发-This xinlix system in the development of PS communication program, with the development of VHDL language
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简单描述了rs232 与pc的通信，采用vhdl硬件描述语言实现，调试通过-A brief descr iption of the rs232 communication with pc
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vhdl写的双口ram，真正实现双口通信-I write vhdl dual ram, true dual-port communication
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Jtag communication design with VHDL scr ipt
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Complete program for VHDL for Interlever block in various communication systems
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FPGA和单片机串行通信接口的实现，VHDL的源代码。-And single-chip FPGA realization of serial communication interface, VHDL source code.
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