搜索资源列表
count
- 00:00到59：59计时器，用verilog实现-time counter up to 1hr
CPLD
- verilog编写的加减6路可逆计数器，用于FPGA对6路脉冲信号的计数-verilog written addition and subtraction 6 way reversible counter for FPGA on the 6-channel pulse count
ones_counter
- Ones counter for Verilog, basic project for Altera FPGA
3
- 秒表verilog 实现，顶层模块，译码模块，计数模块 -Stopwatch verilog implementation, top-level modules, decoding modules, counter modules
SecondDelay
- verilog源代码。 秒倒计时Verilog设计（倒计时秒数可设置），可根据系统时钟更改参数。 -verilog source code，to implement the second counter, with the second number as a parameter.
LFSR_UPDOWN_Verilog
- the LFSR up/down counter are designed in a verilog module easy to implement in any counter operation.
upcounder_verilog
- the up counter are designed to the case statement to perform the counter operation in verilog.
counternew
- counter program in verilog
eda6
- 以Altera公司的MAX+plus II为工具软件，采用Verilog HDL文本输入设计法设计8位二进制加减计数器，生成元件符号-Altera s MAX+plus II tools software, using Verilog HDL text input method to design8 binary addition and subtraction counter, generating element symbol
counterms
- verilog语言写的可置数的倒计时计数器，共四位bcd码，分别为分钟两位和秒两位。波形完美无毛刺.开发环境没找到verilog只好写了vhdl-verilog based counter for minutes and seconds
3
- 数码管显示，加上计数器，基础的verilog语言-Digital display, plus the counter, based on verilog language
Frequency
- 频率计，用verilog编写。语言简洁易懂。-Frequency counter, written in verilog.
test
- verilog实现循环计数器，8位的计数器，可使用在各类FPGA平台中-a loop counter designed by verilog
LCD
- verilog实现的在1602LCD上实现的时钟计数器，可以显示一个电话号码和动态时钟，在EP2C8上测试过-verilog achieve 1602LCD on the clock counter, you can display a phone number, and dynamic clock, tested on the EP2C8
0-59counter
- 0:50 counter using verilog
led
- verilog编写的分频计数器，控制xilinx板子上led灯-verilog written divider counter control xilinx board led lights
Frequency-meter
- 用Verilog语言编写的频率计，可以精确到1Hz-Frequency counter with the Verilog language, can be accurate to 1Hz
ripple_counter
- Ripple Counter Code in Verilog
PC
- Verilog HDL语言编写的32位程序计数器（PC）完整工程及相应仿真，QuartusII7.2下编译通过可正常使用。-Complete engineering and simulation of Verilog HDL language of the 32-bit program counter (PC), QuartusII7.2 compiled through normal use.
40fpga
- 40个FPGA开发的简单实例，让初学者很好的入门。里面都有详细的程序设计思想说明。-You can use the verilog to realize a counter.