搜索资源列表
sopc
- altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
MC8051 IP Core
- 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware descr iption language can be downloaded to the FPGA / CPLD as a system-on-chip processor
100Examples
- 有关于VHDL举例,FPGA/CPLD的运用方面的例子-for example VHDL, FPGA / CPLD to the use of the example
n_dc_motor
- vhdl实现的直流电机控制器 通用程序 对不同fpga/cpld，可能需要修改部分源代码。-VHDL achieved DC Motor Controller General of different procedures they simply / cpld. may need to amend some source code.
digitalinterfaceuart
- 文件说明了在fpga/cpld中怎样实现数据接口及其实例了urat-note of the document they simply / cpld How Data Interface and the examples of urat
Altera_uart_VHDL
- FPGA/CPLD应用,uart通讯VHDL原码.-FPGA / CPLD applications, UART communications VHDL source.
Altera_uart_Verilog
- FPGA/CPLD应用,uart的Verilog HDL原码-FPGA / CPLD applications, UART Verilog HDL source
UARTWISHBONECompatible---Downloads
- 16550 uart code lattice cpld fpga 已经验证-16550 uart ip core
Altera-usb-blaster
- 这是altera CPLD\FPGA USB blaster的驱动，完全可用。-This is altera CPLD/FPGA USB blaster driver, completely available.
VHDL_cpld
- 用CPLD做了个FPGA的FPP下载时序，验证过。-done with CPLD- FPGA FPP download timetables tested.
FPGA
- FPGA（Field－Programmable Gate Array），即现场可编程门阵列，它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路（ASIC）领域中的一种半定制电路而出现的，既解决了定制电路的不足，又克服了原有可编程器件门电路数有限的缺点。-FPGA (field programmable Gate Array), that is, field programmable gate arrays, it is a product of basic
CPLD
- 主要是用于实现FPGA的配置，其是通过CPLD来实现，CPLD作为配置控制器。-Is mainly used to implement FPGA configuration, which is achieved through the CPLD, CPLD as a configuration controller.
FPGA-CPLD--learning-book
- 学习FPGA的入门资料，很全面的讲解，几个资料都很好-FPGA learning introductory information, very comprehensive explanation, several data are good
phase_shift
- cpld/fpga实现移相功能 d触发器 数据选择器 单片机接口-phase_shift using cpld/fpga
HDLC-code
- 网络通信的HDLC源码，使用CPLD/FPGA实现-HDLC network communications source code, the use of CPLD/FPGA to achieve
fpga
- 有关FPGA的好多资料的综合汇总，包括夏宇闻-Verilog经典教程，Verilog-testbench的写法，Altera+FPGA／CPLD设计高级篇，Altera+FPGA／CPLD设计基础篇等好几本书，超值-A comprehensive summary of a lot of information about FPGA, including Xia Wen-Verilog classic tutorial, Verilog-testbench writing, senior Alte
led
- 利用计数器设计延时函数，通过四个led灯的闪烁，可以直观观察延时时长，fpga器件cyclone iv LCMXO2-1200HC-4TG144CR1,在demo板上作简路图(Using the counter to design the delay function, through the flashing of four LED lights, we can observe the delay time directly, FPGA device cyclone IV LCMXO2-12
xapp502配置例程
- FPGA配置例程，VHDL语言，使用CPLD对FPGA进行配置(The FPGA configuration routine, VHDL language, using CPLD on the FPGA configuration)
ADC0804
- 控制ADC0804的verilog 代码，cpld/fpga都可以使用，用数码管显示ADC采集的二进制数据。(Control ADC0804 verilog code, cpld / fpga can be used to display the ADC digital tube with the binary data collected.)
open fpga master
- When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy. Th