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8bitRISCCPU
- 8bit RISC cpu 设计资料 包含夏宇闻老师的教程第8章-8bit RISC cpu design
RiscCpu
- Verilog-RISC CPU 代码 实现了简单的RISC cpu,可供初学者参考,学习硬件描述语言,及设计方法。该程序通过了modelsim仿真验证。 北航-Verilog-RISC CPU code to achieve a simple RISC cpu, a reference for beginners to learn the hardware descr iption language, and design methods. The procedure adopted
06070207
- 计算机组成原理 课程设计 8位简单CPU-Principles of curriculum design computers 8 simple CPU
CPU
- 用VHDL编的简易16位和8位CPU,可完成加减乘法移位等功能,拥有源码和设计文档,资料齐全-Compiled with VHDL simple 16-bit and 8-bit CPU, to be completed by addition and subtraction multiplication shift functions, with source code and design documents, data and complete
cpu
- 给定指令系统的处理器设计,指令字长16位,包含10种操作-Given instruction processor design, 16-bit instruction word length, contains 10 kinds of operations
计算机设计与实践实验 16位cpu设计
- 计算机设计与实践实验 16位cpu设计 使用用VHDL语言 -16-bit cpu design with VHDL
CPU
- 用VHDL设计的cpu 用微指令方法设计 通过rom查表的方式进行设计-Cpu design with VHDL designed by microinstructions way through the design of look-up table rom
MIPS_CPU
- 一个完整的MIPS CPU的设计,是创新设计项目,内含详细的项目设计报告-A complete MIPS CPU design, innovative design projects, detailed project design report containing
cpu
- 计算机组成原理假期课程设计“一个简单的CPU设计”,有全部的设计思路,能够实现四条简单指令-Principles of Computer Organization holidays curriculum design
cpu
- 关于FPGA的CPU的设计,可以看一下,大家讨论学习一下啊-The CPU on the FPGA design, you can see, we discussed learning about ah
class34
- eda中的8位的CPU设计,电子类专业非常实用!-EDA in eight of the CPU design, electronics professional very useful!
CPU
- 从C语言到CPU的指令设计,设计了一个基本的CPU指令集-From the C language to CPU instruction design, the design of a basic CPU instruction set
cpu
- 操作系统课程设计CPU管理源码 用JAVA实现 -Operating system CPU management curriculum design using JAVA source code to achieve
cpu
- cpu的vhdl设计实现加法减法乘法运算-cpu VHDL Design and Implementation of multiplication addition subtraction
mipscpudesign
- cpu设计实例mips。MIPSI指令集32位CPU(1)MiniCore设计实例全32位操作,32个32位通用寄存器,所有指令和地址全为32位 (2)静态流水线(3~5级) (3)Forwarding技术 (4)片内L1 Cache,指令、数据各4KByte,硬件初始化 (5)没有TLB,但系统控制协处理器(CP0)具有除页面映射外的全部功能 -cpu design example mips. MIPSI instruction set 32-bit CPU (1)
n2cpu_nii51004
- NIOSII CPU设计实例,包括AVOLON总线特点和时序要求-NIOSII CPU design examples, including AVOLON bus characteristics and timing requirements
vgachr8080
- code guide to design cpu -code guide to design cpu 8080
POCREPORT
- 为充分利用CPU的运行效率,采用中断功能设计并行输入输出接口,以达到缓解CPU高速运行速度与外设低速缓冲间的矛盾。-To take full advantage of the efficiency of CPU operation, interruption of functional design using parallel input-output interface, in order to alleviate the CPU speed and high-speed periphera
computer6
- 8位CPU软核设计与应用研究-8-bit CPU design and application of soft-core research .......
computer12
- 基于FPGA的八位RISC CPU的设计-FPGA-based RISC CPU design eight ....