搜索资源列表
STM32F0xx_AN4100_FW_V1.0.0
- 基于STM32F0xx的CPU卡或智能卡阅读器的设计开发源码,支持T0,T1传输协议,具有较高的参考价值。- Based STM32F0xx CPU card or smart card reader design source development, support T0, T1 transmission protocol, has a high reference value.
cache_sfg234234
- 嵌入式CPU指令Cache的设计与实现 嵌入式CPU指令Cache的设计与实现-Design and Implementation of Embedded CPU Instruction Cache
CPUDemo
- Delphi:Delphi模拟的CPU曲线图,一个类似XP资源管理器中CPU的曲线图,可适时显示CPU的使用率,还过这只是一个初步的功能设计,还有很多功能有待完善中。。 -Delphi: Delphi simulated CPU graph, a similar XP Explorer graphs of CPU, CPU usage may be time display, which also had only a preliminary functional design, ther
IP_soc
- 几篇SOC方面的期刊与论文。有嵌入式cpu开发,usb控制器的ip设计,以及软硬件协同设计等方面的内容。-Several aspects of SOC journals and papers. Embedded CPU development, IP Design of USB controller, and the hardware software co design and other aspects.
intel_ips
- Some Intel Ibex Peak based platforms support so-called intelligent power sharing , which allows the CPU and GPU to cooperate to maximize performance within a given TDP (thermal design point). -Some Intel Ibex Peak based platforms support so-called
src
- 软件加密 根据CPU和磁盘序列号设计软件注册程序-According to CPU and disk encryption software design software serial number registration procedures
CPUAndDiskReg
- 根据CPU和磁盘序列号设计软件注册程序,VC2008 MFC-According to the serial number of the CPU and disk design software registration process, VC2008 MFC
I-MX31_PMP_SINGLE_BOARD_V1_0
- 采用freescale imx31 cpu开发设计的掌上狄电脑pmp的方案电路图-Program diagram using freescale imx31 cpu development and design of handheld computers pmp of Di
RF_technology
- NFC MIFARE FELICA S50 S70 P2P ID卡 动物标签 18092 14443 技术详细介绍 (1)——概念、分类 (2)——国际标准 (3)——能量、调制 (4)——数据编码 (5)——防冲突 (6)——通讯协议概述 (7)——ID卡 (8)——动物标签 (9)——动物标签HDX (10)——识别号的格式变化 (11)——Mifare系列卡的共性 (12)——三次相互认证 (13)——Mifare S50与Mifare
VHDLCode_8bitCPU
- 这是计算机组成原理的课程设计,将16位CPU改造成8位流水线CPU,AHDL语言,这是改造完成的源代码。-This is a computer composition principle of curriculum design, the 16-bit CPU transformed into eight pipeline CPU, AHDL language, which is the transformation was complete source code.
cpu_1
- 用verilog设计五级CPU的框架,需要自己另行补充指令,可作为学生作业和训练内容-Five CPU with verilog design framework, needs its own separate supplemental instruction can be used as student assignments and training content
SNMPApp
- 用snmp协议制作的网络管理程序可实现CPU 内存 硬盘空间 以及运行程序监控的代码 可作为毕业设计的参考 使用了开源类库snmpsharpnet-Snmp agreement made with the network management program can be realized CPU memory disk space and run the program code can be used as a reference monitor graduation design uses
0_01_12g
- 时间触发嵌入式系统设计,例程是释放CPU的LED程序-Time-triggered embedded system design, the routine is to release the CPU LED program
data_inout_port
- FPGA的I/O接口方向控制的设计,主要应用于与DSP/CPU等接口。-FPGA s I/O interface design direction control, mainly used in the DSP/CPU and other interfaces.
ucgui324
- UCGUI是一种嵌入式应用中的图形支持系统。它设计用于为任何使用LCD图形显示的应用提供高效的独立于处理器及LCD控制器的图形用户接口,它适用单任务或是多任务系统环境, 并适用于任意LCD控制器和CPU下任何尺寸的真实显示或虚拟显示。它的设计架构是模块化的,由不同的模块中的不同层组成,由一个LCD驱动层来包含所有对LCD的具体图形操作。 UCGUI可以在任何的CPU上运行,因为它是100 的标准C代码编写的。UCGUI能够适应大多数的使用黑白或彩色LCD的应用,它提供非常好的允许处理灰度的颜色管
2C-SDK-Espressif-IoT-SDK-Programming-Guide_v1.0.0
- ESP8266 WiFi SoC offers a complete and self-contained Wi-Fi networking solution it can be used to host the application or to offload Wi-Fi networking functions another application processor. When ESP8266 hosts the application, it boots up directl
RISC_CPU1
- 讲述了简易cpu设计的全部过程,代码详细,对于一个初学者是很好的范本-About the whole process, the simple design of CPU code, for beginners is a very good model]
Heart-rate-signal-acquisition
- 介绍了一种基于SoC的简单心率测量方法。整体系统设计包括模拟电路模块和C51 CPU核。其中CPU核是数字处理部分,用来处理心率信号和其它应用的输出信号。经过模拟电路模块,心率信号被转换成脉冲信号,然后把脉冲信号作为心率估算的输入信号进行计算。整个系统工作在一片芯片上。-It describes a simple method of measuring heart rate-based SoC. Overall system design includes analog circuit mod
Linux_Qt_PWM
- 本设计是基于嵌入式技术作为主处理器的AD采集与电机控制系统,利用S3C2410 ARM微处理器作为主控CPU,辅以LINUX操作系统和Qt界面系统,实现了智能化的将AD采集的数据通过Qt界面形式展现出来,同时根据AD值的不同改变PWM的参数值,从而控制电机的方向和转速等功能,并讨论了如何提高系统的速度、可靠性和可扩展性。-This design is based on embedded technology as the main processor s AD acquisition and m
DMA_2440
- DMA通道设计,实现数据快速传输,无需经过CPU,在2440 平台运行,成功编译,代码完整-DMA channel design, implement fast data transmission, without going through the CPU, running at 2440 platform, successfully compile, code integrity