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good_CPU
- 本代码是在modelsim下运行的模拟8×8位的CPU,执行程度,对深入理解CPU设计和运行原理具有重要意义- This code is simulation 8脳8 position CPU which moves under modelsim, carries out the degree, to thoroughly understood the CPU design and the movement principle have the vital significance
MCUDesign
- 《Digital Logic And Microprocessor Design With VHDL》,CPU设计经典参考书-"Digital Logic And Microprocessor Design With VHDL, "CPU design classic reference books
cpuTerminate
- 用VHDL 编写的一个16位的cpu 设计方案,可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
sdcc-src-2.6.0.tar
- sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu-sdcc to 51 other small-scale embedded cpu design c compiler supports several different types of c pu
the-design-of-16-bit-cpu
- 用vhdl硬件语言设计的16位cpu,上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
riscmcu
- 精简CPU设计,需要的可以下来看看,是VERILOG语言写的-streamlined CPU design, the need to be down look at the language is written in verilog
Loongson_2E_datasheet
- Chinese No.1 CPU Loongson 2E datasheet,support national CPU design
硬件cpu&rom课程设计
- 这是有关cpu和存储器挂接的一个硬件课程设计,图片是用protel 99 se 画的,程序用唐都仪器调试通过,仅为一个理论性的东西。自己写的,请多指教。--It is a class written by me, which describes cpu and rom hardware design. The picture is drawn by protel 99 se. The program is passed on Tang Du instrument.
HighSpeedBoardDesign中文版
- 本文为应用于嵌入式电子线路硬件pcb布线方面的书籍,讲解高速66M-200M主频cup的设计方法--A book describes high speed 66M-220M CPU design method. It could be applied in laying out pcb in embedded circuit hardware.
8bit.详细的八位十六进制频率计课程报告
- 详细的八位十六进制频率计课程报告,是我的eda课程设计报告书,Detailed eight hexadecimal Cymometer curriculum report is my report on the curriculum design EDA
cpudesign_doc.rar
- RISC cpu设计的经典教程,牛人讲义哦。,RISC cpu classic design tutorials, cattle were handouts Oh.
PIPE_LINING_CPU_TEAM_24
- 采用Quatus II编译环境,使用Verilog HDL语言编写实现了五段流水线CPU。 能够完成以下二十二条指令(均不考虑虚拟地址和Cache,并且默认为小端方式): add rd,rs,rt addu rd,rs,rt addi rt,rs,imm addiu rt,rs,imm sub rd,rs,rt subu rd,rs,rt nor rd,rs,rt xori rt,rs,imm clo rd,rs clz rd,rs slt rd,rs,rt sltu rd,
CPUsheji
- 哈工大计算机学院设计与实践cpu设计与实践-cpu design from hit computer science
CPU
- 哈尔滨工业大学VHDL实验六给定指令系统的处理器设计-Six Harbin Institute of Technology VHDL test given instruction processor design
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
OR1200_verilog
- or1200开源risc cpu的verilog描述实现,cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog descr iption of the risc cpu realize, cpu source code analysis and chip design source book
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
SmartCard1
- 智能电子钱包终端设计(一) ——CPU卡与COS文件结构-E-purse smart terminal design (a)- CPU card file structure and COS
模型机的分析和设计
- 通过对计算机的组织与结构的分析,综合运用所学计算机原理知识,设计并实现较为完整的计算机,即模型机。它可以完成一般计算机的最基础功能,具备16条基本指令,以及4种寻址方式等。并且,计算机数据通路的控制将由微程序控制器来完成,CPU从内存中取出一条机器指令到指令执行结束的一个指令周期全部由微指令组成的序列来完成,即一条机器指令对应一个微程序。设计过程包括四个部分:㈠模型机硬件组成分析;㈡指令系统设计;㈢微程序设计;㈣上机实现,示范程序。- Through to the computer organi
CPU
- CPU曲线跳舞的小程序设计 可以将CPU曲线变为三角形 正弦-CPU curve small dance program design can be CPU sine curve into triangles