搜索资源列表
ths5651
- ths5651的驱动程序，应用于cyclone 1c12，电子设计大赛使用过的-ths5651 driver, used in the cyclone 1c12 used by the Electronic Design Contest
c2h_fft_cyclone_ii
- 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed descr iption of altera
TLC549
- tlc549驱动程序，应用于cyclone 1c12，电子设计大赛使用过的-TLC549 driver, used in the cyclone 1c12 used by the Electronic Design Contest
Protel99_lib_ALTERA
- 比较全的ALTERA芯片的原理图和封装库(Protel99)，对需要画Altera FPGA PCB版图的同志很有用。-Comparing all the ALTERA chip schematic and footprint library (Protel99), on the need to draw Altera FPGA PCB layout comrades useful.
rel_08_done
- 修改自OpenCores的黑白棋游戏代码。采用VGA输出显示，PS2键盘（W、A、S、D、回车）输入控制，实现AI，LED灯指示是否游戏结束，VGA显示频率25MHz，系统频率50MHz，经过Cyclone IV芯片EP4CE115F29C7N的板级调试，实现全部功能，文件夹下有rtl源代码，管脚定义pin文件，和可以直接进行JTAG烧写和E2PROM烧写的pof和sof文件，-Modified from OpenCores Othello game code. Using the VGA ou
VHDL_MIAOBIAO_CODE
- 基于CYCLONE系列FPGA EP1C3T144C8的VHDL秒表代码-CYCLONE series based on the FPGA EP1C3T144C8 stopwatch VHDL code
CycloneIII_SB_3C25
- Altera的CycloneIII Start Board,使用的PFGA是3C25，包括原理图和PCB，用Cadence Allegro打开-Altera
fpga_uartrw
- FPGA的uart控制器的verilog源程序，在cyclone II EP2C8Q208上调试运行成功-FPGA s UART controller Verilog source code, in cyclone II EP2C8Q208 debugging run successfully
VerilogHDL_t
- fpga设计参考实验手册红色飓风系列fpga设计参考实验手册，红色飓风系列-FPGA reference design experiment manual red hurricane series FPGA reference design experiment manuals, red hurricane series
EP1C6Q240C6
- EP1C6Q240C6开发板原理图，Altera公司的Cyclone系列FPGA—EP1C6Q240-EP1C6Q240C6 development board schematics, Altera' s Cyclone series FPGA-EP1C6Q240
FSKmodulationanddemodulation
- FSK调制与解调，整个设计基于ALTERA公司的QuartusⅡ开发平台，并用Cyclone系列FPGA实现。所设计的调制解调器具有体积小、功耗低、集成度高、软件可移植性强、扰干扰能力强的特点,符合未来通信技术设计的方向。-FSK modulation and demodulation, the entire design is based on ALTERA' s development platform Quartus Ⅱ, and Cyclone series FPGA implem
CycloneII_2C35
- 基于cyclone II 的视频解码程序,-Cyclone II-based video decoding process,
EP1C6_12_1_2_MOTO
- 基于ALTERA的cyclone 系列的控制电机的实验例程-ALTERA series based on the cyclone motor control routine of the experiment
neek_alternate_sd_card_controller
- This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a
FPGA_AM
- 基于cyclone系列FPGA的模拟幅度调制的VHDL代码-Cyclone series FPGA-based simulation of VHDL code amplitude modulation
16bit_display8bitLED
- Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. In
cycloneandcyclone2
- cyclone和cyclone2用在5v系统里使用方法,使得FPGA芯片在5V系统中兼容-cyclone and cyclone2 system used in the use 5v, making FPGA chip compatible with the 5V system
Cyclone_Calc_RevWithSplineJan-2006
- 旋风分离器设计,验算模板改进的,不需查图,采用二次样条插值,并有详细说明 -Cyclone separator design, an improved check template without Chaturvedi, using quadratic spline interpolation, and a detailed descr iption