搜索资源列表
DDR2_XILINX
- xilinx FPGA设计需要的DDR2文件，可以应用于实际设计中-xilinx FPGA design needs DDR2 files that can be applied to the actual design
ddr2_defs
- C-code for register scope ddr2.
Cali
- 时间交替并行ADC相位误差、偏置误差、增益误差的校正，ddr2 sdram内存条的控制，基于visual dsp-phase, offset and gain error calibration of time-interleaved ADCs, ddr2 sdram controlment
DDR2Controller
- DDR2 SDRAM Control Verilog RTL Code
DE4_230_DDR2_UniPHY_QSYS
- DE4系列开发板关于ddr2在Qsys系统搭建的实例，有一定参考价值，。-DE4 series development board on the DDR2 in the example of Qsys system, has a certain reference value,.
4077mt48lc32m16a2
- 美光公司提供的DDR2的verilog仿真模型和do文件-Micron DDR2 provides the verilog simulation model and do file
6.sdram
- 此程序是关于ARM cortex A8 的ddr2驱动-This program is about ARM cortex A8 of ddr2 drive
ddr2_defs_asm
- Register rw imp ctrl, scope ddr2 for Linux v2.13.6.
ddr2_defs
- C-code for register scope ddr2 for Linux v2.13.6.
ddr2
- Summit expansion board is manufactured for Linux v2.13.6.
video_center_scan_scaler_alpha_blend
- 本工程实现两路视频信号阿尔法通道混合(alpha blend), 视频信号黑点中心 点扫描定位，期间用到视频帧缓存（frame cache）、视频信号缩放(scaler)等，且用到ram、DDR2等作为缓存，是很值得参考的视频图像处理工程。-scaler,alpha blend,ddr2 controller,center scan, frame cache, dpram, etc by verilog, include code and discr iption
ddr2.pdf
- JEDEC DDR 2 memory interface specification document
Atlys_MCB_configure
- 基于赛灵思公司的Atlys开发板的DDR2控制器MCB的配置实例，调试通过-the example for MCB configuration of Xilinx development board
example
- 一个嵌入式开发板的测试程序，包含LCD，DDR2，算法等等的测试程序-An embedded development board test program, including LCD, DDR2, algorithm testing procedures etc.
codes
- my codes....................................................................................................
1Gb_DDR3_SDRAM
- DDR2 specification protocol for ddr design
project_11_first_d1_HDMI
- 本代码将TW2867第一通道输出解复用以后进行BT.656格式的解析，然后将奇偶场合并为一帧存入DDR2，读取的时候使用双线性插值算法，将原始的720 x576的分辨率放大到800x600，然后在HDMI口输出。-This code will TW2867 first channel output demultiplexing after parsing BT.656 format, then the parity occasions and as a frame stored in DDR2,
ddr2_controller
- A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.
LC930_AR9331-WiFi-module
- LC930 是深圳灵卡技术推出的低成本，较低功耗，高性能嵌入式WiFi模块。采用高通AR9331一体化单芯片WIFI无线SOC解决方案. 内部集成CPU,WIFI基带，PA，使产品体积显著减小。LC930引出了众多功能接口，例如：串口，SPI主设备口，网口，USB口，I2S接口，GPIO口等,使得LC930可以广泛应用在无线数据传输，多媒体音视频传输，无线数据存储等应用场合。 LC930是一款基于高通Atheros ARA9331的芯片,8 MB Flash，64MB DDR2的全新功能WIFI
DDR_TEST_OK
- 接口DDR2读写测试模块，好用，测试正确-Interface DDR2 read and write test module， ，test correctly