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AD9850
- 此为89C2051控制DDS频率合成器AD9850,内含51之组合语言之程式码以及其电路图,电路图为一般图档.-This is 89C2051 control DDS Synthesizer AD9850, intron 51 of the assembly language code and its circuit diagram, circuit diagram for the general image.
DDS
- 此为DDS之简单的CLOCK初始设定,压缩档内包含keil C Uv2档以及.C档供DDS之初学者参考.-This is the DDS of a simple initial setup CLOCK, compressed file contains, and keil C Uv2 file. C file for DDS of reference for beginners.
dds
- 直接频率合成器,采用verilog hdl-Direct frequency synthesizer using verilog hdl
DF1404B0808
- DDS产生程序,可实现波形的编译和调试波形的幅度,以及波形的周期-DDS generation process, enabling the compiler and debug waveform waveform amplitude, as well as cycle waveform
dds
- 使用VHDL硬件描述语言实现了直接频率合成器的制作,并在Altera公司的CycloneII上得到实现,验证了代码的正确性。用户操作可以参照程序中的说明,请使用QuartusII6.0以上版本打开,低版本打开时会有错误提示-Using VHDL hardware descr iption language to achieve a direct frequency synthesizer production, and Altera s CycloneII be realized, to ver
07_DDSmokuai
- DDS模块 EWB Quartus2编译 电子综合设计试验箱程序-DDS module EWB Quartus2 chamber compile electronic integrated design process
DDS
- 一个基于AD9954的430单片机编程,液晶使用的是FYD12864-AD9954 430-based single-chip programming, LCD using FYD12864
dds_new
- 驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率可以做到Hz量级-Clock driver joined the PLL, the DDS makes the clock-driven variable-.32-bit NCO makes the resolution of DDS can be done Hz magnitude
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词:FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
Sinout
- dds正弦可控发生计全结果 用到matlab,dsp,Quartus II 6.0软件-dds controllable sinusoidal occurred wholly the result of use of matlab, dsp, Quartus II 6.0 software
DDS_Single
- DDS产生正弦波程序源代码,通过调试能正常使用-DDS sine wave generated source code through the debugger to normal use
FPGA_signal_general
- 摘 要:介绍了直接数字频率合成 (DDS) 技术的基本原理,给出了基于Altera公司FPGA器件的一个三相正弦信号发生器的设计方案,同时给出了其软件程序和仿真结果。仿真结果表明:该方法生成的三相正弦信号具有对称性好、波形失真小、频率精度高等优点,且输出频率可调。 关键词:直接数字频率合成;现场可编程门阵列;FPGA;三相正弦信号-Abstract: Direct Digital Synthesis (DDS) technology, the basic principles are giv
FPGADDS
- 基于FPGA的DDS信号发生器的简单实现。DDS(直接数字合成)是近年来迅速发展起来的一种新的频率合成方法。这种方法简单可靠、控制方便,且具有很高的频率分辨率和转换速度,非常适合快速跳频通信的要求。 -FPGA-based signal generator DDS simple to achieve. DDS (direct digital synthesis) is a rapidly in recent years developed a new method of frequency sy
high_speed_tap8_DDS
- 用verilog编写的高速8路并行dds模块,用于与高速da(1ghz或以上)接口产生任意频率正弦波,模块已经经过工程验证,用于产品中。-Verilog prepared with high-speed 8-way parallel dds modules for use with high-speed da (1ghz or above) interface have any frequency sine wave, the module has been proof for the prod
dp_test
- 本程序是用VHDL语言编写的,其中包括并口通讯,DDS电机调速,编码器信号处理等,对研究这方面的工程人员有一定参考作用-This procedure is used VHDL language, including the parallel port communication, DDS motor, encoder signal processing and so on, to look at this area of engineering staff have a certain refe
AD9956
- 直接频率合成器 (DDS)ad9956 单点频功能程序,用于c51单片机控制ad9956,程序为设置70M点频,用户设置不同频控码,即可设置不同频率。 -Direct frequency synthesizer (DDS) ad9956 frequency function of a single point of procedure, for the C51 single-chip control ad9956, procedures for the establishment of 70
AD9850dds
- AD_9850是一个可以实现多种波形显示的芯片 - 单片机DDS驱动程序,可以同时驱动两块AD9850,并带LCD驱动显示 - AD9850设计软件 AD9850设计软件-AD_9850 is a waveform display can realize a variety of chips- single-chip DDS driver can drive two AD9850, and belt-driven LCD display- AD9850 design software
dds
- AD9852的应用,介绍9852 的功能及实现方法-the descr iption of ad9852
STC12C5410AD-based-on-the-DDS-signal-generator
- 内容:包含原程序代码和protel99格式的原理图。 工作模式:扫频、点频、跳频。 实现功能:液晶显示频率值、工作模式。 硬件资源:STC12C5410AD、ad9850、LCD12232F。-Content: contains the original program code and schematics protel99 format. Working modes: Sweep, point-frequency, frequency hopping. Implementatio
DDS
- 经过仿真验证的,可用。附带说明,比较经典的程序-After simulation, and can be used. Incidental note, compare the classic procedure