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2620990DDS
- 直接频率合成（DDS）、FPGA平台上任意波形发生器的设计-Direct frequency synthesis (DDS), the design of arbitrary waveform generator on FPGA platform
test
- 基于ALTERA fpga的DDS信号发生器程序，实现波形自动赋值和在1602上显示的功能-DDS signal generator program based on ALTERA fpga.It can generate waveform and assign its frequency automatically and displayed on 1602 screen.
cf_ad9129_ebz_edk_14_4_2013_03_12.tar
- FPGA+DDS+DAC,ADI参考设计-verification of AD9129-EVB based on FPGA
fpga_sin_fangbo_vga_sanjiaobo
- FPGA作为DDS，三角波，方波，正弦波，然后可以再VGA上显示 里面注释详细，已经仿真，验证，测试了-FPGA as DDS, triangle wave, square wave, sine wave, then you can then VGA detailed notes on the inside, has simulation, verification, testing shows
DDS_sinwave
- 基于FPGA对DDS芯片的仿真。能产生10M以上正弦波。并且波形不失真。-Simulation of DDS chip based on FPGA. Can produce more than 10M sine wave. And the waveform is not distorted.
saopin_saveV2
- 在FPGA中利用DDS的原理实现了扫频功能并使用高速的AD采集数据，同时完成了数字峰值检波，并配合高速DA实现数据的输出-Use DDS principle in the FPGA to achieve the sweep function and use of high-speed data acquisition AD, while the completion of the digital peak detection, and with high-speed data output DA
c5
- 加法器、乘法器、除法器、DDS函数信号发生器等FPGA实现-Some signal generator build by FPGA！
dds_clk
- VHDL代码实现FPGA中DDS功能，输出频率可调-VHDL code for the FPGA DDS function, the output frequency is adjustable
ZX_SOPC0
- 基于FPGA的DDS信号源设计 1.输出信号为正弦波、三角波及脉冲 2.信号幅度可调,范围：1V~5V 3.调幅步长：10mV 4.信号频率为低频：10HZ~1MHZ 5.频率调节步长10HZ~100HZ频段为1HZ,100HZ~1kHZ频段为10HZ,1KHZ~1MHZ频段为100HZ 6.频率调节方式通过键盘输入 7.运用LCD显示信号的类型、幅度、调频步长、调幅步长-DDS source FPGA-based design 1. The output sig
DDS_hzh
- 基于FPGA实现的DDS信号发生器，能产生正弦波、方波、锯齿波三种波形。-FPGA-based realization of DDS signal generator can produce sine, square, ramp three waveforms.
DDDDDDDDDSSS
- FPGA实现DDS正弦波、方波、三角波发生器Verilog程序（已验证）Quartus工程文件-FPGA realization DDS sine, square, triangle wave generator Verilog program (verified) Quartus Project Files
vftvdr
- 基于FPGA的DDS信号发生器设计，包含Quartus 的工程，打开即可使用，Verilog 语言编写！-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容-FPGA design, including the Quartus project, open to use, Ve
27_dds_wave
- dds test,基于FPGA的dds测试，很好的学习资料，大家都来学一学-is very good
ZHWX
- DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL-DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.
dds_clk
- FPGA工作时钟位50MHz，通过引出FPGA时钟信号，供给外部DDS模块使用。-FPGA clock work bit 50MHz, led by FPGA clock signal supplied to the external DDS module.
cic
- 无线通信中的DDS原理，讲解了FPGA实现数字频率合成器-Wireless communication in the DDS principle, to explain the FPGA to achieve digital frequency synthesizer
cy4ex31
- 基于FPGA控制的DDS波形发生器，可在Cyclone IV系列板子上使用，已经过仿真验证-Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation
FPGA_phase_lock_demodulation
- FPGA 用Verilog语言实现数字锁相解调系统，包含了正交的DDS函数发生器和相应的AD驱动-FPGA digital demodulation system in Verilog lock, comprising a DDS orthogonal function generator and driving the corresponding AD
eda
- 直接数字频率 相位累加器 寄存器 lpm_rom(Based on VHDL+ FPGA design of the DDS signal has been through mode)
步进电机S曲线算法
- 实现步进电机S曲线的算法。可用C语言实现，算法用C实现，然后数据可以通过FPGA用DDS处理，输出任意频率和脉冲个数。(Algorithm for realizing S curve of stepping motor. C language can be implemented, the algorithm is implemented with C, and then data can be processed by FPGA using DDS, output arbitrary freq