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A7105-for-FIFO-mode-V0.4
- 笙科A7105无线通讯模组参考代码。学习无线通讯最好看看。-Sheng Section A7105 wireless communication module reference code. Learning to see the best wireless communications.
FIFO_Design
- 一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation
OS_Sieral_OK_(fifo)
- 这是本人调用small rtos51的函数来仿真写的基本代码-This is a small rtos51 I call a function to write the basic code simulation
code
- Simulation and Synthesis Techniques for synchronous FIFO Design
CuFIFO
- fifo的vhdl代码,比较简单，适合初学。-fifo the VHDL code, is relatively simple, suitable for beginners.
asyn_fifo
- verilog编写的异步fifo源代码，asyn_fifo.v为顶层，调用其他四个文件-asynchronous fifo prepared Verilog source code, asyn_fifo.v for top-level, call the other four documents
vhdlfi
- fifo vhdl源码，高可靠性，带有格雷码同步，有需要可依进行参考！-fifo vhdl source, high reliability, with Gray-code synchronization, there is a need-based reference!
75448172geleicounter
- 这是异步fifo的vhdl实现代码，已经在FPGA上通过实践证明，运行状态良好-This is the asynchronous fifo realize the VHDL code has been adopted in the FPGA Practice has proved that running in good condition
bulkloop
- EZ-USB FX2 SLAVE FIFO模式固件代码-EZ-USB FX2 SLAVE FIFO mode firmware code
myfifo
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_bb
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_syn
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave0
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave1
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
FIFOinterface
- fifo(8):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
FIFO.OPT
- 操作系统课程设计（源码和报告） 请求页式管理缺页中断模拟设计--FIFO、OPT-Operating systems curriculum design (source code and reports) request page management page fault analog design- FIFO, OPT
keyb
- fifo code. i have adde the code for key lib to the data which has been transfered-i have adde the code for key lib to the data which has been transfered
fifotop
- 基于FPGA编写的VHDL语言，FIFO代码程序。 程序完整。-VHDL-based FPGA written language, FIFO procedure code. Complete the procedure.
gencontrol
- 高速任意波形产生器控制模块 控制NCO,FIFO，并串转换-hign-speed wfgenerator control