搜索资源列表
LcdCtrl
- FPGA控制12864液晶屏，16位总线实现数据及指令发送，配合SPI模块可控制SPI型液晶屏，程序中包含液晶的初始化指令，实际使用过-FPGA control 12864 LCD screen, 16-bit bus for transmitting data and instructions, with the SPI module can control SPI LCD screen, LCD initialization instruction program contains, act
FPGA_GigE
- 文章描述基于FPGA的千兆网实现方法，传输视频数据，采用UDP协议，速度千兆以上-The article describes the FPGA based gigabit network implementation method, the transmission of video data, the use of UDP protocol, the speed of Gigabit
MIPI-CSI-interface-module
- 该代码是用FPGA实现的MIPI CSI接收的代码，可以连接MIPI的摄像头并把摄像头的MIPI数据解析成并行的数据接口与CPU连接-The code is the code received MIPI CSI implemented in an FPGA, you can connect the camera and the MIPI MIPI camera parse data into parallel data interface connected to the CPU
NandFlash-controll
- FPGA实现的NandFlash控制器,支持多种数据宽度的FLASH芯片-FPGA controller achieve NandFlash
RAW2RGB
- FPGA中将RAW原始图像数据转换为RGB格式图像的Verilog源代码，共两个文件，亲测可用-The FPGA will be RAW data is converted to RGB format images of original image Verilog code, a total of two files, close test available
Dijkstra
- 用verilog 实现求最短路的Dijkstra算法，用modelsim仿真通过，数据真确，-Dijkstra implemention with verilog base on FPGA
5_bluetooth_uart
- 基于FPGA，硬件平台：basys3，软件平台：vivado。描述语言：verilog。封装自己的蓝牙串口IP。蓝牙串口数据传输需要三个模块，分别是波特率生成模块，接收模块和发送模块。-Based on the FPGA hardware platform, software platform: basys3, vivado. Descr iption: verilog. Package your own Bluetooth serial port IP. Bluetooth serial da
USB_send_recive
- 完全用verliog写的FPGA和CH372与电脑USB设备通信。可以和电脑收发数据，已经测试成功，如有疑问留言，程序可能有点乱，-Written entirely in verilog FPGA and CH372 USB devices to communicate with the computer. And computers can send and receive data, it has been tested successfully, if in doubt leave a m
TX_RX
- FPGA用verilog实现串口和电脑的字符串以及单字符精准无误通信，即通过电脑向FPGA发送任一长度数据，FPGA返回PC相同的数据。波特率为9600，本例程为了得到精准的波特率使用了50M时钟的3倍频，测试可用，如有不明的地方，可以给我留言-FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA u
vhdl-GPS
- 基于FPGA设计一个GPS模块电路，实现数据接收和处理功能-Based on the FPGA, a GPS module circuit is designed to realize the GPS data receiving and processing functions.
LMK61XX
- 引脚可选且频率固定的差分振荡器,可提供90飞秒 (fs) 的业内最低抖动，从而使得设计人员能够优化性能关键应用中的信号完整性，并降低数据传输误差。可实现轻松定制、频率裕量，并且在一个器件内支持针对现场可编程门阵列 (FPGA) 、模数转换器 (ADC) 、数模转换器 (DAC) 和高速串行链路的多个时钟频率。-High-Performance Ultra-Low Jitter Oscillator
Software-V1.1
- STM32F103VET6 单光子数据采集程序，采集FPGA读过来的单光子数，上传至上位机。进行图谱绘制。-STM32F103VET6 single photon data collection procedures, collection FPGA to read a single photon number, upload first bit machine. Atlas of conduct.
SDRAM_96M
- 基于FPGA的SDRAM串口实验，verilog语言写的，附件里是做实验的工程，连上串口，下进去就有数据了，波特率9600，一个停止位，SDRAM时钟是96MHz，数据时FPGA自动产生的，正确输出结果是00到FF递增一，再循环。这个工程警告比较少，基本是故意为之的警告，时序也已经收敛。-FPGA-based SDRAM serial experiments, verilog language written annex is to do the experiment works, even o
FPGA_SPI_recive_display
- FPGA 接收主发端SPI接口发来的数据，解调并用FPGA板上的数码管显示。 SPI发送端程序见STM32F407版SPI发送.rar-FPGA receives the master SPI interface data , demodulation and display on digital LED digital displays . Master SPI sending program see STM32F407 version SPI send.Rar
STM32F407_SPI_send
- SPI主发送数据，供FPGA接收对比解调效果使用，SPI接收端程序见 FPGA_SPI_recive_display.rar - SPI master transmit data for FPGA receiver demodulates effect using contrast, SPI slave program, see FPGA_SPI_recive_display.rar
Beamforming
- 基于FPGA的波束形成，包括ad转换，数据存储等部分-FPGA-based beamforming, including ad conversion, data storage and other parts. .
LBG64_double_CLK
- 数据压缩算法的硬件实现ASIC&FPGA（矢量量化算法）-Data compression algorithm implemented in hardware ASIC & FPGA (vector quantization algorithm)
temp_rec
- 基于FPGA实现1-wire温度传感器数据接收-data receive 1-wire bus based on FPGA
SPI_ROM
- FPGA实现非标准SPI总线数据的接收和解码，并实现ROM数据的读取和执行-FPGA implementation of non-standard SPI bus to receive and decode the data, and to achieve ROM data read and
ram
- 此代码可以是FPGA内部ram存储器在读取一系列数据后，然后每间隔1秒钟读出来。-This code can be read in the FPGA internal ram memory after a series of data, and then read out at intervals of 1 second.