制作ROM正弦表并填充FPGA内部ROM，通过调用内部数据实现正弦波输出，开发环境quartusii , 语言verilog , 调试通过 ， 附有modelsim调试结果。-Make ROM sine table and fill the ROM internal FPGA, by calling the internal data to achieve the sine wave output, development environment QuartusII, Language Veri

用Delphi来发生彩色LED显示屏的资料。在VHDL固件里，保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still

ARM最小系统，vivado或ISE综合后下载至FPGA板子上可以做ARM用，包含连接在AHB总线上的RAM和ROM，ARM内核引出JTAG接口，可以连接调试器用keil-MDK进行调试！(ARM minimum system, vivado or ISE integrated download to the FPGA board can be used as ARM, including the RAM and ROM connected to the AHB bus, the ARM ker