搜索资源列表
test_spi
- 原创的altera de2-70 FPGA板功能测试实验，用于spi的读写。包含完整源代码，仿真文件，可直接下载到板子上的SOF文件，适合初学者研习。-Original altera de2-70 FPGA board function test, used for SDram read and write. Contains the complete source code, the simulation files, can be directly downloaded to the boa
SDRAM_Test5
- 基于EP1C12Q240C8的红色飓风二代FPGA开发板的SDRAM测试程序，含有写入和读出FIFO，串口UART,数据发生模块。-Based EP1C12Q240C8 a red hurricane II FPGA development board SDRAM test program, containing written and read FIFO, serial UART, data generation module.
05_sdram_vga_test
- VIP FPGA板的配套例子，这个是VGA格式lcd液晶屏幕显示用,通过SDRAM。-VIP FPGA board example.
Verilog-language--de-CPU
- 基于verilog语言的FPGA开发，平台在QuartusII上，对SDRAM的读写-Verilog language based FPGA development platform on QuartusII, the SDRAM read and write
sdram_ov7670_rgb
- ov7670+sdram+vga显示的代码，用verilog写的 ，fpga开发时的参考资料-code ov7670+sdram+vga displayed with verilog written references when fpga development
sdr_sdram_EP1C3T144C8N
- 基于FPGA芯片 EP1C3T144C8N的SDRAM verilog hdl代码-the SDRAM verilog hdl code based on FPGA chip-- EP1C3T144C8N
12_sdram
- 为 NIOS 系统中最重要癿一个外部器件，它 担仸着重要癿角色，大家对它也应该径熟悉。每次上电癿时候，FPGA 都会把 FLASH 中癿程序送刡 SDRAM 中运行，乀所以返样来做就是因为它癿速度径忚，但它掉电是 要丞失数据癿，所以要把数据存刡 FLASH 中。-sdram is used to storge data at outside memory.
DE2_TV
- 本代码为Altera DE2开发板例程源码，（FPGA：EP2C35F672C6）quartus II 9.0以上可以编译（随板源码为7.2以下版本，在9.0以上版本编译会报错）。本代码实现一个音视频播放器TV_BOX。-This demonstration plays video and audio input a DVD player using the VGA output and audio CODEC on the DE2 board. There are two major bl
DE2_115_TV
- This an application of FPGA which wrote by Altera. It can be used for interfacing VGA, SDRAM on DE2-115-This is an application of FPGA which wrote by Altera. It can be used for interfacing VGA, SDRAM on DE2-115
FPGA_5
- 无SDRAM的PCI采集,给出PCI采集的FPGA程序，桥芯片也为PLX9054，已验证通过-No SDRAM, PCI capture, given FPGA PCI acquisition program, bridge chips for PLX9054, has been verified by
sdram_src
- 基于FPGA的读写控制，sdram，简单易懂，verilog代码描述-FPGA-based read and write control, sdram, easy to understand, verilog code Descr iption
nios_EPCS_SDRAM
- 基于niso ii 13.1开发的测试系统，使用QSYS设计了硬件系统，包含了全部模块，在硬件基础上开发了相应的软件，测试成功了epcs 和sdram，基于DE2开发板，可以直接使用！大家只需要开发软件即可！-DE2 FPGA NIOS 13.1
sdram_demo_de2_115
- 适用于DE2 115开发板的SDRAM测试代码，基于黑金开发板改编，可以直接下载到DE2 115上面。内部有所有代码解释-FPGA SDRAM_TEST DE2 115
VmodCAM_Ref_VGA_Split
- 双目视觉系统的FPGA实现；CMOS摄像头驱动，VGA图像显示；SDRAM控制器；调试成功；Diligient公司源码IP核-Binocular vision system on FPGA CMOS camera driver, VGA image display SDRAM controller
user_logic_vga_stream
- fpga实现VGA的控制，中间采用SDRAM进行缓存-FPGA vga sdram
Zynq-Mini-ITX-Rev-E
- Zynq Mini-ITX 单芯片可编程SOC(ARM+FPGA)开发板电路原理图 -Zynq Mini-ITX Development Board Schematics the Zynq Mini-ITX development board features 2 GB DDR3 SDRAM, PCIe Gen2 x16 Root Complex slot (x4 electrical), SATA-III interface, SFP interface, QSPI Flash me
OV7255_RAW8_RGB888_VGA
- FPGA实现，OV7255摄像头的采集，RAW格式转为RGB格式，用SDRAM存储，然后VGA显示-FPGA implementation, collection OV7255 camera, RAW format into RGB format, with SDRAM memory, and VGA display
sdram_led1
- 用于焊接硬件ＳＤＲＡＭ时调试，FPGA驱动SDRAM看能否工作，led可选用户自定义引脚-Used in the welding of the hardware SDRAM, FPGA driver SDRAM to see whether the work, led optional user defined pin
SDRAM_96M
- 基于FPGA的SDRAM串口实验，verilog语言写的，附件里是做实验的工程，连上串口，下进去就有数据了，波特率9600，一个停止位，SDRAM时钟是96MHz，数据时FPGA自动产生的，正确输出结果是00到FF递增一，再循环。这个工程警告比较少，基本是故意为之的警告，时序也已经收敛。-FPGA-based SDRAM serial experiments, verilog language written annex is to do the experiment works, even o
CD1_PHOTO_ABLUM_1280
- 基于FPGA的数码像册实验，使用了NIOS做文件系统和JPEG图像解码FPGA和SDRAM做了图像缓存-Based on the FPGA digital image book experiment, using the NIOS to do file system and JPEG image decoding FPGA and SDRAM do the image cache