搜索资源列表
FLASH_PCB
- M25P64-SPI-FLASH芯片的FPGA控制程序，已仿真验证-M25P64- SPI- FLASH chip FPGA control program, simulation
utosnet_latest.tar
- The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC. The framework is based on the Node-on-Chip architecture (link to paper comi
my_spi_done
- Xilinx EDK开发 通过FPGA实现SPI通信-DK Xilinx development through SPI to achieve FPGA communication
spi_module
- 使用FPGA编辑Verilog语言来实现控制SPI，完成SPI时序，并在该时序下实现数据的传输和接收。-FPGA and SPI
Sparten6-CODE-_Verilog
- 基于xilinx 厂商的FPGA硬件的开发源代码，包括UART,SPI,以太网通信-The development of FPGA hardware based on xilinx manufacturers source code, including the UART, SPI, Ethernet communication and so on
Oc_spi
- FPGA的SPI接口例子，功能成熟，可以参考-SPI Master Core Specification
SPIS_Sim20160406
- 自己编写的SPI通信FPGA程序，运行速率10Mbps亲测可行-SPI source code for FPGA
spislavecontroller-sourcecode
- spi gpio扩展,可用作FPGA扩展GPIO用，标准时序-spi gpio
adc_dac
- ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA
SPI_STM32_FPGA
- STM32F1与FPGA通过SPI进行通信，我上传的是32部分的程序，已经通过串口测试成功。此程序可拓展为和单片机，DSP通过SPI进行通信-STM32F1 and FPGA communication through the SPI, I uploaded the 32 part of the procedure has been successfully tested through the serial port. This program can be extended to and s
spi_verilog_master_slave_latest.tar
- 该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始，用于通用的FPGA到设备接口。 所产生的内核产生小而高效的电路，从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing. The resulting co
UpdateApp1.2
- 这是FPGA的升级程序，C#发送bin文件给FX3，然后FX3再把数据通过SPI通信发送给FPGA-This upgrade program the FPGA, C# FX3 sent to the bin, and then FX3 data to the FPGA via SPI communications
spi_slave
- FPGA实现SPI接口的从机功能，接收和发送全双工运行，接收到的数据以八位LED灯显示-FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights
spi_master
- 使用verilog语言实现FPGA下的SPI的主机模式，波特率为晶振时钟的五分之一，发送稳定-Using verilog language to achieve the SPI under the host mode, the baud rate is one-fifth of the crystal clock, send stable
tinycpufiles
- TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程，可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元，外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008)，可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is
06_MCU2FPGA_SPI_Test
- 基于fpga的spi模块的设计 主设备是stm32-The design of the SPI module based on FPGA, the main device is stm32
spi_test
- 基于FPGA的SPI通讯测试，可以一块FPGA单独测试，也可以2片FPGA对测。-SPI communication test, based on the FPGA can be a piece of FPGA test alone, can also be 2 piece of FPGA for measurement.
adv7390_test_U29_auto
- ADV7390芯片for FPGA XC7K325T的测试程序，内包含芯片的SPI配置参数，程序烧录进FPGA后接BNC线可以在监视器上看到滚动的彩条。- ADV7390 for chip FPGA testing procedures XC7K325T, SPI configuration parameters included in the chip, the program downloaded into FPGA connected to the BNC line can se
97957700spi
- 验证过的程序 ，平时自己测试用的，供大家参考使用。(Own serial test procedures, validation, and very complete. For your reference use)
AN84868 - Source files for FX3 Firmware
- 通过Cypress的EZ-USB FX3的SPI接口对Xilinx FPGA进行配置(AN84868 shows you how to configure a Xilinx FPGA over a slave serial interface using FX3 which is the next-generation USB 3.0 peripheral controller.)