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SPI_verilogHDL
- 本原码是基于Verilog HDL语言编写的,实现了SPI接口设计,可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success
SPI_VHDL
- SPI串口的内核实现(vhdl),可以用qII等软件直接加到FPGA或者CPLD里面.-the SPI Serial Kernel (vhdl) can be used directly qII software foisted CPLD or FPGA inside.
M_FPGALoading
- 利用ARM的GPIO和SPI总线进行FPGA的被动串行配置,加载速度可以达到200KBytes/Sec.
omap_fpga
- omap5912 spi interface driver. In addition, supply a fpga download example via spi
vspi_VHDL
- FPGA/CPLD VHDL语言实现SPI,拥有两种模式,FPGA/CPLD即可工作在主机模式,又可工作在从机模式
FPGA_SPI
- FPGA实现SPI的内核驱动 FPGA实现SPI的内核驱动
ourdev_192095
- FPGA模拟SPI接口驱动3310液晶屏的 详细驱动
spi_master
- 基于CPLD/FPGA的SPI控制的IP核的实现spi_master
080513154000
- 并行转串行的VHDL描述:基于FPGA的SPI发送模块的设计
bingo_spi_test
- 利用SPI实现FPGA和外设之间的通信。经过Modelsim仿真验证。(为FPGA设计技巧与案例开发详解一书源码)(Using SPI to implement communication between FPGA and peripheral. After Modelsim simulation verification. (for FPGA design techniques and case development detailed explanation of a book source
hmc960
- hmc960芯片的初始化程序,可以实现verilog程序,微波信号的放大(hmc960 initial code,spi ,verilog,amplify)
AT25160B
- 该代码完成存储器的数据存储和读取功能,该芯片是一款Atmel的SPI接口的EEPROM存储芯片。(The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.)
spi_no_cs_13
- FPGA作为从机与STM32的全双工通信,FPGA将接收到STM32的数据返回到STM32,Modelsim仿真和板子仿真都通过(Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.)
SPI_controller
- SPI controller (fpga/verilog)
spi_master
- SPI通信:串行flash的读写擦除命令通过SPI接口进行通信。? CPU芯片与FPGA通过SPI接口进行通信。? 其他功能集成电路芯片参数寄存器配置。例如DAC芯片内部有很多寄存器(因为芯片有很多功能,要通过设置寄存器不同的开关来打开或关闭相应的功能,一上电去初始化寄存器)需要我们去配置。FPGA一上电也是通过配置芯片里边来读取数据,然后配置FPGA内部的SRAM。FPGA是读取FLASH里边的串行数据,读取完校验完才配置到我们的FPGA的SRAM中去。速度比串口快,而且是同步传输。(Th
_spi_test1
- data transmitted from FPGA to devices using SPI bus
spi_master
- 用verilog编写的SPI代码,这个代码是FPGA作为主机可以发送和读取数据,上板验证过,我测试的时候SPI的CLK速率是5M,读写都没问题,稳,至于更高的速率没测试过。 下面鬼畜的百度翻译大家就不要看了,我不知道他想表达啥意思~(SPI code written in Verilog, the code is FPGA as the host can send and read data, the upper board verified, when I test the SPI CL
xapp1247-multiboot-spi
- fpga的multiboot ref desgin(fpga multiboot ref desgin)
flashZ
- FPGA控制m25p16flash芯片读写控制spi协议 可实现擦除写入读出功能(SPI protocol for read and write control of m25p16 flash chip controlled by FPGA Erase Write-Read Function)
adc_interface-master
- ADC_Interface Simple SPI interface for AD7908/AD7918/AD7928 written in verilog HDL