搜索资源列表
FPGAtomcs51
- FPGA与51单片机通信接口电路工程文件，非常好用，对于学习VHDL语言的同学们帮助很大。-FPGA and MCU communication interface circuit 51 project files, very easy to use, for students to learn VHDL language of great help.
NET2
- This file with the wavelet transf Mallat implementation of wavelet Verilog hdl code modules for radi Modelsim 6.6 crack, can be used f A written using Verilog DDR2 cont Simple CPU VHDL implementation an Dual-port RAM design, usi
A-VHDL-Primer---Bhasker
- VHDL exaples project from CPLD or FPGA
FPGAMP3_LUKA_Project_Proposal
- The goal of this project is to design a MPEG Layer III (MP3) player using a FPGA board. The FPGA will read MP3 source files, decode them into a 16-bit Pulse Code Modulated (PCM) output, and play the audio files through an external speaker.
uart_transceiver
- 一个通用串口通信FPGA程序。大家可以借鉴-a uart FPGA pragram.you can modify and use it in your project.
LCD-display
- fpga的键盘阵列LCD显示程序，包括vhdl文件，顶层文件和工程文件-fpga array of keyboard LCD display procedures, including vhdl files, top-level files and project files
adfmreceiver
- The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency,iωand the respective output frequency,oωvia p
VHDL
- 基于FPGA的IIR滤波器的各模块VHDL程序- such as in science and project technique. Compared with FIR digital filter, IIR digital filter can get high selectivity with low factorial.
FPGA
- FPGA交通灯说明： 1. 本程序使用VHDL加原理图方式设计而成。 2. 实验时，使用Quartus II软件完成了工程管理与下载验证，使用max+plus II软件进行了功能仿真。 3. 由于实验当时对原理图文件缺乏足够的认识，导致原原理图以及仿真输出文件已经丢失。现在的工程 RTL视图以及仿真输出波形均是在Quartus II软件下得到的。-FPGA traffic lights shows:1procedures for the use of the VHDL sch
vhdl-clock-with-vga-output-for-Nexys-2
- Vhdl code for a working digital clock which can be displayed on a vga screen. The clock can be set using a single pushbutton. This project was written for nexys 2 board but can be easily ported to any other fpga using vhdl.
lab555
- 利用FPGA，VHDL建立工程项目，实现dicegame功能-FPGA, VHDL Establishment of Project to achieve dicegame function
lab0-part1
- 利用FPGA，VHDL建立工程项目，入门项目，实现点亮LED-Use of the FPGA, VHDL projects, entry project, lit LED
00.SW_LED_Nexys3
- 内容是关于FPGA的VHDL和verilog的程序，都是基于硬件项目的小程序-Program on the FPGA VHDL and Verilog, are based on a hardware project procedures
01.BTN_LED_Nexys3
- 内容是关于FPGA的verilog和VHDL的程序，都是基于硬件项目的小程序-Program on the FPGA VHDL and Verilog, are based on a hardware project procedures
20120720
- 北京大学信息科学技术学院开设的2012暑期课课程—基于FPGA上的VHDL设计，内容包含全部必选实验的工程文件和仿真波形。-Opened the 2012 Summer Course in Science, Peking University Institute of Technology- based on the FPGA VHDL design, the project file that contains all mandatory experiments and simulation
VHDL--traffic-light-reports-and-code
- 用VHDL实现交通灯项目，并用FPGA验证！-The traffic light project using VHDL and FPGA verification!
graphicallcd_latest.tar
- It s a project in VHDL for interfacing a graphical LCD with an FPGA. The project is an open-source file.
Project
- 基于FPGA的AES算法的VHDL实现，低内存模式-aes vhdl code
1.High-Speed-FPGA-Implementation-of-FIR-Filter-fo
- related to VHDL language project
US-Navy-VHDL-Modelling-Guide
- 该标准的硬件和可靠性项目的产品（SHARP），技术独立电子产品的代表（TIREP）工程美国海军研究实验室（NRL），海军的合作努力水面作战中心（NSWC）开发FPGA的使用标准。-A Product of the Standard Hardware And Reliability Program (SHARP), Technology Independent Representation of Electronic Products (TIREP) Project A coopera