搜索资源列表
AES
- 这是一个AES加密算法的程序，适用verilog hdl语言写的-A AES ALGORITHM
CCD_Sim
- 用verilog HDL语言编写的面阵CCD相机输出图像程序。-The CCD camera output image process using Verilog HDL language.
paral_to_serial
- 用verilog HDL编写的并行接口转串行接口的程序。-The programming of parallel interface to serial interface with HDL verilog.
FPGA_verilog_uart-
- 基于 FPGA器件设计实现UART的波特率产生器、UART发送器和接收器及其整合电路,，利用Veriolog-HDL语言对这三个功能模块进行描述并加以整合，通过ModelSim仿真，用串口调试程序进行验证，最终实现一个通用异步收发器的设计。-UART baudrate generator, transmitter and receiver and its integrated circuit are implemented by FPGA device. Using Veriolog-HDL d
accumulator
- 一个简单的加法器实现程序，已验证，使用的是Verilog HDL编写，适合初学者入门学习-A simple adder procedures, verified, using Verilog HDL prepared, for beginners to learn
accsub
- 简单的加法器减法器程序代码，Verilog HDL初学者学习可以使用-Simple adder subtractor code, Verilog HDL beginners can use
tugedafinal
- 使用Verilog HDL语言写的关于实现对ADC、MDC控制的程序，个人使用Quartus 7.2,在上面进行过仿真，暂时还没有发现问题-Using Verilog HDL language written on the realization of the ADC, MDC control procedures, personal use Quartus 7.2, in the above simulation carried out have had no problems found
ML605_LED
- ML605_LED 用Verilog HDL编写的LED闪烁的程序，很简单-ML605 LCD Verilog HDL prepared with flashing LED program, very simple
i2c_lightsensor
- 用Verilog HDL编写的光敏传感器AD/DA程序，AD结果显示在LCD上，DA结果控制LED的亮度，相关软件：ISE Design suit，硬件：xilinx FPGA开发板-Verilog HDL prepared with light sensors AD/DA program, AD results are displayed on LCD, DA of controlling LED brightness, software: ISE Design suit, hardware:
SaleMachine
- 使用verilog HDL语言编程的自动售货机程序，是初学者联系的FPGA的简单例程-Use verilog HDL programming language vending machine program, it is a simple routine for beginners to contact the FPGA
shizhong
- 基于Verilog HDL语言的数字时钟程序，有秒脉冲，，计数，译码显示等部分-based on Verilog HDL language,about clock
conv313
- 卷积码编译码（3，1，3）的编码verilogHDL程序-Convolution code codec (3,1,3) coding verilog HDL program
lcd1602_testshiyan4
- 液晶lcd1602的verilogHDL显示程序-verilog HDL lcd1602 liquid crystal display program
Clock
- 该程序主要是用Verilog HDL语言编写的多功能数字钟，包括校时，调试，整点报时和万年历模块。-The program is mainly used Verilog HDL language multifunction digital clock, including at school, debugging, the whole point timekeeping and calendar modules.
uart
- FPGA 串口发送程序，基于verilog HDL，对于串口调试还是很有帮助的哦。-FPGA serial transmission program, based on verilog HDL, or helpful for debugging serial oh.
example19-LCD1602
- 基于verilog HDL的LCD1602显示程序，调试通过，可直接调用。-Based verilog HDL of LCD1602 display program, debugging through, can be called directly.
example17-DS1302_ok
- FPGA verilog HDL开发的时钟芯片DS1302程序，调试可用。-FPGA verilog HDL developed clock chip DS1302, debuggers are available.
example20-LCD12864
- FPGA 12864lcd驱动程序，verilogHDL语言开发，可直接使用。-FPGA 12864 lcd driver, verilog HDL language development, it can be used directly.
example14-ADC-ok
- 基于verilog HDL开发的ADC tlc549程序控制，已经调试通过。-Based verilog HDL developed ADC tlc549 control program has been adopted debugging.
Receiver
- FPGA SPI串行收发数据全双工程序开发，使用Verilog HDL开发语言-FPGA SPI serial port to send and receive data all double engineering sequence development, using Verilog HDL language development