搜索资源列表
fftsoft
- 应用altera的最新fft核做的使用范例,fft核遵循avalon总线。对于想使用altera的IP core的朋友有帮助-Application of nuclear altera do the latest example of the use fft, fft nuclear follow avalon bus. Who want to use the IP core of friends altera help
95zlg_avalon_lcd128_64
- 周立功公司推出的IP核,此IP核为12864驱动IP核。-ZLG has introduced the IP core, IP core, 12864 drivers for this IP core.
yy
- 使用XILINX公司提供的板子里面的FFT的IP核,很好用-XILINX board provided the use inside the FFT of the IP core, useful
pci32tlite_oc_latest.tar
- pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to p
ISP1362-IP
- ISP1362的IP核用在USB 控制上可与PC通讯,作为SOPC的IP核-ISP1362' s USB IP core used in the control of communication with PC as the IP core SOPC
pc_cfr_v2_0_msim_r2_0
- Xilinx公司pc_cfr IP核的MatLab仿真-matlab simulation model of pc_cfr ip core of xilinx
pipelined_fft_64
- 利用IP Core编写的Verilog程序,实现FFT变换,希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
fftip
- 2008-2009年优秀硕士论文之:基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
8051vlog
- 8051IP核,verilog源代码,包含测试向量,-8051 IP Core verilog code, with testbench
sdi_prj
- altera sdi ip core的使用例程-altera sdi ip core of the use of routine
fft_2011_3_23(COMPLETE-FFT1024)
- VERILOG FFT IP核调用,以及其控制文件-VERILOG FFT IP core call, as well as its control file
LogiCORE-1000BASE-X
- The LogiCORE™ IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller (MAC) or other custom logic and supports two standards of operation that can be dynamically s
SOPC-movie-IP
- 基于SOPC 的视频编解码IP 核的设计-SOPC-based video codec IP core design
verilog-usb--protel-design
- 基于FPGA的usb2.0 ip核设计,所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
multiplier_ip
- 基于IP核的乘法器设计,multiplier_ip中包含完整的工程设计文件,用户可以在Xilinx ISE下运行-Based on IP core of design, multiplier_ip on time-multiplier contain complete engineering documents, users can run Xilinx ISE
CoreSPI_21_eval
- SPI IP核源码,包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages Verilog and VHDL source code
xapp1022
- xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件、-xilinx FPGA platform testing by MET PCIe IP core documentation and source files
Quartus-IP---usage
- 关于IP核的应用的说明 很好的参考手册 不要错过-IP core applications on the instructions not to miss a good reference manual
mypro_synfifo
- 基于IP核RAM的同步fifo设计,工程使用Xilinx的开发软件ISE-RAM-based synchronization fifo IP core design, engineering, software development using Xilinx ISE
CPCI_PCIbus
- 为构建一个紧凑、灵活的 CPC I系统,在 IP核的基础上,采用 FPGA来实现 PCI总线接口电路。-To construct a compact and flex ible CPC I syste m, the PCI i nte rface c i rcuit i s i mp l em ented by FPGA based on IP core。