搜索资源列表
usb_doc
- USB IP core.very good
Synopsys
- Synopsys 8051 IP core documentation.
I2C_IPcore_VHDL
- 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware descr iption language of the IP core can be directly translated Operation
Altera的IP源码8237
- 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
aes_core
- AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use,
sARM7TM
- ARM7TM core源码，此码来自于opencore组织，此组织免费提供一些IP core，都是一些老外写的。-ARM7TM core source, the code from opencore organizations, this organization provided free IP core, are written by foreigners.
USB2.0_rtl_ipcore_verilog
- 经过门级网单验证的USB2.0 IP核 RTL代码-net after gate-level verification of USB IP Core RTL code
ARM_Core
- arm verilog hdl ip core-arm Verilog HDL core ip
mc8051_ug
- MC8051 IP Core Synthesizeable VHDL Microcontroller IP-Core-MC8051 Synthesizeable VHDL IP Core Microc ontroller IP-Core
ref-ualaw
- A率/u率 压缩与解压缩的IP核，。 # 由AHDL语言写成，可在MaxplusII和QuartusII中使用，源代码加密。-A rate / u rate compression and decompression of the IP core,. By AHDL # languages, and the Quartus II MaxplusII use, the source code encryption.
AUDIO_DAC
- 一个关于声音处理的Verilog语言编写的解码芯片，可以用于FPGA处理芯片的IP核，欢迎大家来用。-a voice on the Verilog language decoder chip, FPGA can be used to handle IP core chips, all are welcome to use.
wbm
- 用walsh算法实现的符号数乘法器,asic流片时,可以不用公司的付费乘法器的ip core.-algorithm using the symbols multiplier, HDL-piece quantities. it is not necessary for the company's paid Multiplier ip core.
ata_ip
- ATA接口的IP核,经过量产的验证,已经在quartus5.1下编译通过了.-ATA interface IP core, after volume production test in quartus5.1 compiler passed.
wb_dma.tar
- DMA的控制器的IP核,和ATA控制器配合,可以实现DMA方式高速传输数据.-DMA controller IP core, and ATA controller tie, DMA can achieve high-speed transmission of data.
user_logic_VGA_Controller
- user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller
simon_IP
- 实现总线加密或解密的IP核（APB总线）（含tb测试平台）(Realization of encryption and decryption of IP core (APB bus))
PG007_Xilinx RapidIO IP阅读笔记
- srio pg007 中文，iP核介绍和仿真步骤(The iP core is introduced and simulation steps)
LaSaNewNB_M88E1111_TCP1000mhz
- 用FPGA，基于M88E1111芯片实现的TCP/IP协议的千兆网，将协议封装成IP核(With the FPGA, the TCP/IP protocol based on the M88E1111 chip is used to encapsulate the protocol into IP core)
can_v3_2
- XILINX 的IP核CAN V3.2的VHDL程序(XILINX's IP core: CAN_V3.2-VHDL)
iir_2n_ip_float_demo
- 使用altera提供的ip核，实现了浮点数运算的2阶iir滤波器，结果与matlab运算结果相同。(Using the IP core provided by Altera, the 2 order IIR filter of floating point operation is implemented, and the result is the same as that of MATLAB operation.)