搜索资源列表
ask_fsk
- 数字通信系统振幅键控ASK信号和频移键控FSK的调制与解调的VHDL代码-ASK amplitude shift keying digital communication system signal and the frequency shift keying modulation and demodulation of the VHDL code for
cpsk
- 用VHDL硬件语言对BPSK调制解调系统进行编写，仿真通过，源代码-VHDL hardware language using BPSK modulation and demodulation system, the preparation, simulation adopted, the source code
qam_64
- 64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核-64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS
verilog_16QAM
- 使用verilog实现全数字16QAM调制器，载波频率1MHZ，数据比特流的速率为100Kbps,-the modulation of 16QAM based on FPGA
matlabfile
- many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation-many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation
DATA_16QAM_MAP
- 用于WLAN 802.11a的OFDM发射机的数字调制16QAM-For WLAN 802.11a transmitter of the OFDM digital modulation 16QAM
fangz
- 数字通信系统的仿真，包括调制解调，上下变频，加入了高斯白噪声，并且每个步骤都生成相应的图形-Digital communication system simulation, including the modulation and demodulation, the upper and lower frequency, by adding Gaussian white noise, and each step generates the appropriate graphics
VHDL
- 基于VHDL硬件描述语言，对基带信号进行调制，仿真和设计-VHDL hardware descr iption language based on the base-band signal modulation, simulation and design
Study_on_Key_Technologies_of_n4-DQPSK_Modulation_a
- 本文首先研究可4一DQPsK调制解调系统中调制部分的基本原理和各个模块的设计方案，重点研究成形滤波器和直接数字频率合成器 (DireetoigitalFrequeneySynihesis，简称DDS)，并针对各个关键模块算法进行matlab设计仿真，展示仿真结果。其次，研究调制解调系统解调部分的基本原理和各个模块的设计方案，重点研究差分解调，数字下变频和位同步算法，也针对其各个关键模块进行算法的Matlab设计仿真。然后用Matlab对整个系统进行理论仿真，得出结论。在此基础 上，采用超高速
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
signal
- 本例实现了一个FSK/PSK信号调制通信系统。通过FPGA平台上的按键控制，可分别产生FSK和PSK波形。-This example implements a FSK/PSK modulation communication systems. FPGA platforms through key control, FSK and PSK waveforms are generated.
an501_design_example
- 在MAX2系列CPLD上实现脉冲宽度调制(PWM),完整的设计成程序和仿真结果。-In the MAX2 series CPLD to realize pulse width modulation (PWM), a complete design and simulation results into the program.
dayin
- 该程序利用vhdl语言，采用查表法实现am调制，此方法简洁又有效-The program using vhdl language, using look-up table method to achieve am modulation, this method is simple and effective
qpsk
- 实现qdpsk数字调制，应用的是相位选择法进行调制-Achieve qdpsk digital modulation, the phase selection method is applied to modulate
QPSK
- 用FPGA实现QPSK调制的4篇论文，对用FPGA开发QPSK很有帮助！-QPSK modulation with FPGA Implementation of 4 papers on the use of FPGA development QPSK helpful!
2-ask
- 2-ASK调制解调的FPGA实现。ASK-TWO为调制程序，two-ASK为解调程序。-2-ASK modulation and demodulation of the FPGA. ASK-TWO for the modulation process, two-ASK for the demodulation process.
2-fsk
- 2-fsk调制解调的fpga实现。two-fsk为调制程序，fsk-two为解调程序。-2-fsk modulation and demodulation of fpga implementation. two-fsk for the modulation process, fsk-two for the demodulation process.
ofdm
- ofdm调制解调的fpga实现。使用Verilog实现IEEE 802.16a系统的调制解调模块。-ofdm modulation and demodulation of fpga implementation. Verilog implementation using IEEE 802.16a system, modem module.
QPSK_modulator_demodulator
- Wireless_Communication_FPGA设计代码之一：QPSK调制解调的FPGA实现 将相应的源文件复制到本地硬盘上，修改属性为可写，然后在ISE环境中新建工程，然后添加相应的源文件即可。-Wireless_Communication_FPGA one of the design code: QPSK modulation and demodulation of the FPGA to achieve the corresponding source files to loc
ADPCMCodec
- The DVI Adaptive Differential Pulse Code Modulation (ADPCM) algorithm was first described in an IMA recommendation on audio formats and conversion practices [1]. ADPCM is a transformation that encodes 16-bit audio as 4 bits (a 4:1 compression ratio).